From: Maxime Ripard <maxime@cerno.tech>
To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Thomas Zimmermann <tzimmermann@suse.de>,
Maxime Ripard <maxime@cerno.tech>,
Daniel Vetter <daniel.vetter@intel.com>,
David Airlie <airlied@linux.ie>, Eric Anholt <eric@anholt.net>
Cc: linux-arm-kernel@lists.infradead.org,
bcm-kernel-feedback-list@broadcom.com,
linux-rpi-kernel@lists.infradead.org,
dri-devel@lists.freedesktop.org,
Dave Stevenson <dave.stevenson@raspberrypi.com>
Subject: [PATCH v4 7/8] drm/vc4: hdmi: Limit the BCM2711 to the max without scrambling
Date: Mon, 7 Dec 2020 14:39:47 +0100 [thread overview]
Message-ID: <20201207133948.2109194-8-maxime@cerno.tech> (raw)
In-Reply-To: <20201207133948.2109194-1-maxime@cerno.tech>
Unlike the previous generations, the HSM clock limitation is way above
what we can reach without scrambling, so let's move the maximum
frequency we support to the maximum clock frequency without scrambling.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 795fd23c8f58..e759ebd5fa34 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -82,6 +82,8 @@
#define CEC_CLOCK_FREQ 40000
#define VC4_HSM_MID_CLOCK 149985000
+#define HDMI_14_MAX_TMDS_CLK (340 * 1000 * 1000)
+
static int vc4_hdmi_debugfs_regs(struct seq_file *m, void *unused)
{
struct drm_info_node *node = (struct drm_info_node *)m->private;
@@ -1908,7 +1910,7 @@ static const struct vc4_hdmi_variant bcm2711_hdmi0_variant = {
.encoder_type = VC4_ENCODER_TYPE_HDMI0,
.debugfs_name = "hdmi0_regs",
.card_name = "vc4-hdmi-0",
- .max_pixel_clock = 297000000,
+ .max_pixel_clock = HDMI_14_MAX_TMDS_CLK,
.registers = vc5_hdmi_hdmi0_fields,
.num_registers = ARRAY_SIZE(vc5_hdmi_hdmi0_fields),
.phy_lane_mapping = {
@@ -1934,7 +1936,7 @@ static const struct vc4_hdmi_variant bcm2711_hdmi1_variant = {
.encoder_type = VC4_ENCODER_TYPE_HDMI1,
.debugfs_name = "hdmi1_regs",
.card_name = "vc4-hdmi-1",
- .max_pixel_clock = 297000000,
+ .max_pixel_clock = HDMI_14_MAX_TMDS_CLK,
.registers = vc5_hdmi_hdmi1_fields,
.num_registers = ARRAY_SIZE(vc5_hdmi_hdmi1_fields),
.phy_lane_mapping = {
--
2.28.0
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next prev parent reply other threads:[~2020-12-07 13:42 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-07 13:39 [PATCH v4 0/8] drm/vc4: hdmi: Support the 10/12 bit output Maxime Ripard
2020-12-07 13:39 ` [PATCH v4 1/8] drm/vc4: hvs: Align the HVS atomic hooks to the new API Maxime Ripard
2020-12-07 13:39 ` [PATCH v4 2/8] drm/vc4: Pass the atomic state to encoder hooks Maxime Ripard
2020-12-07 14:16 ` Thomas Zimmermann
2020-12-07 15:56 ` Maxime Ripard
2020-12-07 13:39 ` [PATCH v4 3/8] drm/vc4: hdmi: Don't access the connector state in reset if kmalloc fails Maxime Ripard
2020-12-07 14:05 ` Thomas Zimmermann
2020-12-07 13:39 ` [PATCH v4 4/8] drm/vc4: hdmi: Create a custom connector state Maxime Ripard
2020-12-07 14:07 ` Thomas Zimmermann
2020-12-07 13:39 ` [PATCH v4 5/8] drm/vc4: hdmi: Store pixel frequency in the " Maxime Ripard
2020-12-07 14:14 ` Thomas Zimmermann
2020-12-07 15:44 ` Maxime Ripard
2020-12-07 13:39 ` [PATCH v4 6/8] drm/vc4: hdmi: Use the connector state pixel rate for the PHY Maxime Ripard
2020-12-07 14:20 ` Thomas Zimmermann
2020-12-07 13:39 ` Maxime Ripard [this message]
2020-12-07 13:39 ` [PATCH v4 8/8] drm/vc4: hdmi: Enable 10/12 bpc output Maxime Ripard
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