From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0CD2DC4361B for ; Wed, 16 Dec 2020 13:46:58 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9C06D2255F for ; Wed, 16 Dec 2020 13:46:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9C06D2255F Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bootlin.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=XIxp6T/y8MIKcDF5wgr4AJ19IjFyS//p7czVYMRKHmM=; b=jJCJ70h/B3vaD+j0ut0RLSDs4 rPVkUYOPW4A3Mz+WjtHI3JAWsFVPJLYIbulPjUgGZnaa2b5Csffc7KG/hjW4fiEDjiGQxDsE3T5GS Tou+W24XPxwnV+Ysxp+WQ5Pqwt+1w5wklcJ0nV3/eU5l9SK+FMwJDv/gLZtFf1gRN2Llym88WNfW7 Ivu3rl0NorQbY9rbAbeupgZAfChdHsWWpMjrMfU+TNFhDgaaaCC+0/WBSv6u8vUOY+VdIKw1Rqr69 JXAo8E0DArHi+5pZaHV2pmuk7Y8AsXVOMf2qQ2F62iXG6HOlkHxmSD5rW0D7y2Edl9daT2YtpTuXL spxPeeWNw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kpX7d-0003yS-EI; Wed, 16 Dec 2020 13:45:41 +0000 Received: from relay3-d.mail.gandi.net ([217.70.183.195]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kpX7Z-0003xh-D5 for linux-arm-kernel@lists.infradead.org; Wed, 16 Dec 2020 13:45:38 +0000 X-Originating-IP: 86.202.109.140 Received: from localhost (lfbn-lyo-1-13-140.w86-202.abo.wanadoo.fr [86.202.109.140]) (Authenticated sender: alexandre.belloni@bootlin.com) by relay3-d.mail.gandi.net (Postfix) with ESMTPSA id EDD5560013; Wed, 16 Dec 2020 13:45:32 +0000 (UTC) Date: Wed, 16 Dec 2020 14:45:32 +0100 From: Alexandre Belloni To: Claudiu Beznea Subject: Re: [PATCH 3/3] power: reset: at91-sama5d2_shdwc: add support for sama7g5 Message-ID: <20201216134532.GH2814589@piout.net> References: <1608123453-1423-1-git-send-email-claudiu.beznea@microchip.com> <1608123453-1423-4-git-send-email-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1608123453-1423-4-git-send-email-claudiu.beznea@microchip.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201216_084537_632637_39FF214E X-CRM114-Status: GOOD ( 22.78 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, sre@kernel.org, ludovic.desroches@microchip.com, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 16/12/2020 14:57:33+0200, Claudiu Beznea wrote: > Add support for SAMA7G5 by adding proper struct reg_config structure > and since SAMA7G5 is not currently on LPDDR setups the commit also > avoid the mapping of DDR controller. > Honestly, I wouldn't leave the LPDDR part out because there is no guarantee anyone will think about it when they have a design with LPDDR and as a consequence, their device will behave properly but will be very short lived. > Signed-off-by: Claudiu Beznea > --- > drivers/power/reset/at91-sama5d2_shdwc.c | 72 ++++++++++++++++++++++++-------- > 1 file changed, 54 insertions(+), 18 deletions(-) > > diff --git a/drivers/power/reset/at91-sama5d2_shdwc.c b/drivers/power/reset/at91-sama5d2_shdwc.c > index 3996167f676f..a3342c8c3728 100644 > --- a/drivers/power/reset/at91-sama5d2_shdwc.c > +++ b/drivers/power/reset/at91-sama5d2_shdwc.c > @@ -78,9 +78,15 @@ struct pmc_reg_config { > u8 mckr; > }; > > +struct ddrc_reg_config { > + u32 type_offset; > + u32 type_mask; > +}; > + > struct reg_config { > struct shdwc_reg_config shdwc; > struct pmc_reg_config pmc; > + struct ddrc_reg_config ddrc; > }; > > struct shdwc { > @@ -262,6 +268,10 @@ static const struct reg_config sama5d2_reg_config = { > .pmc = { > .mckr = 0x30, > }, > + .ddrc = { > + .type_offset = AT91_DDRSDRC_MDR, > + .type_mask = AT91_DDRSDRC_MD > + }, > }; > > static const struct reg_config sam9x60_reg_config = { > @@ -275,6 +285,23 @@ static const struct reg_config sam9x60_reg_config = { > .pmc = { > .mckr = 0x28, > }, > + .ddrc = { > + .type_offset = AT91_DDRSDRC_MDR, > + .type_mask = AT91_DDRSDRC_MD > + }, > +}; > + > +static const struct reg_config sama7g5_reg_config = { > + .shdwc = { > + .wkup_pin_input = 0, > + .mr_rtcwk_shift = 17, > + .mr_rttwk_shift = 16, > + .sr_rtcwk_shift = 5, > + .sr_rttwk_shift = 4, > + }, > + .pmc = { > + .mckr = 0x28, > + }, > }; > > static const struct of_device_id at91_shdwc_of_match[] = { > @@ -285,6 +312,10 @@ static const struct of_device_id at91_shdwc_of_match[] = { > { > .compatible = "microchip,sam9x60-shdwc", > .data = &sam9x60_reg_config, > + }, > + { > + .compatible = "microchip,sama7g5-shdwc", > + .data = &sama7g5_reg_config, > }, { > /*sentinel*/ > } > @@ -294,6 +325,7 @@ MODULE_DEVICE_TABLE(of, at91_shdwc_of_match); > static const struct of_device_id at91_pmc_ids[] = { > { .compatible = "atmel,sama5d2-pmc" }, > { .compatible = "microchip,sam9x60-pmc" }, > + { .compatible = "microchip,sama7g5-pmc" }, > { /* Sentinel. */ } > }; > > @@ -355,30 +387,34 @@ static int __init at91_shdwc_probe(struct platform_device *pdev) > goto clk_disable; > } > > - np = of_find_compatible_node(NULL, NULL, "atmel,sama5d3-ddramc"); > - if (!np) { > - ret = -ENODEV; > - goto unmap; > - } > + if (at91_shdwc->rcfg->ddrc.type_mask) { > + np = of_find_compatible_node(NULL, NULL, > + "atmel,sama5d3-ddramc"); > + if (!np) { > + ret = -ENODEV; > + goto unmap; > + } > > - at91_shdwc->mpddrc_base = of_iomap(np, 0); > - of_node_put(np); > + at91_shdwc->mpddrc_base = of_iomap(np, 0); > + of_node_put(np); > > - if (!at91_shdwc->mpddrc_base) { > - ret = -ENOMEM; > - goto unmap; > + if (!at91_shdwc->mpddrc_base) { > + ret = -ENOMEM; > + goto unmap; > + } > + > + ddr_type = readl(at91_shdwc->mpddrc_base + > + at91_shdwc->rcfg->ddrc.type_offset) & > + at91_shdwc->rcfg->ddrc.type_mask; > + if (ddr_type != AT91_DDRSDRC_MD_LPDDR2 && > + ddr_type != AT91_DDRSDRC_MD_LPDDR3) { > + iounmap(at91_shdwc->mpddrc_base); > + at91_shdwc->mpddrc_base = NULL; > + } > } > > pm_power_off = at91_poweroff; > > - ddr_type = readl(at91_shdwc->mpddrc_base + AT91_DDRSDRC_MDR) & > - AT91_DDRSDRC_MD; > - if (ddr_type != AT91_DDRSDRC_MD_LPDDR2 && > - ddr_type != AT91_DDRSDRC_MD_LPDDR3) { > - iounmap(at91_shdwc->mpddrc_base); > - at91_shdwc->mpddrc_base = NULL; > - } > - > return 0; > > unmap: > -- > 2.7.4 > -- Alexandre Belloni, Bootlin Embedded Linux and Kernel engineering https://bootlin.com _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel