From: Maxime Ripard <maxime@cerno.tech>
To: Paul Kocialkowski <contact@paulk.fr>
Cc: devicetree@vger.kernel.org, Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@siol.net>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] ARM: dts: sun8i-v3s: Add PWM controller and pins definitions
Date: Thu, 17 Dec 2020 17:30:45 +0100 [thread overview]
Message-ID: <20201217163045.i5o5sb4pls4gn52g@gilmour> (raw)
In-Reply-To: <20201217112031.2243683-1-contact@paulk.fr>
Hi,
On Thu, Dec 17, 2020 at 12:20:31PM +0100, Paul Kocialkowski wrote:
> This introduces definitions for the PWM controller found in the V3s,
> as well as associated pins. This fashion of the controller has two PWM
> outputs and is register-compatible with the A20.
>
> Both PWM outputs were tested on a Lichee Pi Zero with a simple
> transistor-LED setup.
>
> Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
> ---
> arch/arm/boot/dts/sun8i-v3s.dtsi | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
> index a9f5795d4e57..34a4e638c762 100644
> --- a/arch/arm/boot/dts/sun8i-v3s.dtsi
> +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
> @@ -398,6 +398,16 @@ spi0_pins: spi0-pins {
> pins = "PC0", "PC1", "PC2", "PC3";
> function = "spi0";
> };
> +
> + pwm0_pin: pwm0-pin {
> + pins = "PB4";
> + function = "pwm0";
> + };
> +
> + pwm1_pin: pwm1-pin {
> + pins = "PB5";
> + function = "pwm1";
> + };
> };
>
> timer@1c20c00 {
> @@ -416,6 +426,14 @@ wdt0: watchdog@1c20ca0 {
> clocks = <&osc24M>;
> };
>
> + pwm: pwm@1c21400 {
> + compatible = "allwinner,sun7i-a20-pwm";
We should have a (documented) v3s compatible there along with the A20
Thanks!
Maxime
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prev parent reply other threads:[~2020-12-17 16:32 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-17 11:20 [PATCH] ARM: dts: sun8i-v3s: Add PWM controller and pins definitions Paul Kocialkowski
2020-12-17 16:30 ` Maxime Ripard [this message]
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