From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 501D2C4361B for ; Thu, 17 Dec 2020 20:39:57 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E2F5123A03 for ; Thu, 17 Dec 2020 20:39:56 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E2F5123A03 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Message-ID:Subject:To:From: Date:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References:List-Owner; bh=T7JjVn94JsjAypEBvTl7pheQBJLVMBA/I8UcugFo4Vc=; b=xUsTgBmz+gqfe1F6brvlcLBC5 ao87EzODFVDfbyo4X+WYcPUmkV6TI0VPeM7VEWQsM+zjzhFz+g/bH00MsHfKAFmM5ae7j3LWygoIT M0usCSigzETrkFRrc15MWZIcIv1C6h5rXeJ8wElXOeaPpL8UDMZfv/MqjKOEpFf06ZAtCI4sTB+Tq SxaSZt86iZLjpmBgkLBKgq8g0YBbCFOBWESa1uCAU6Fgt7BQ0Y08LEuEu+BRpUw6xn7LXihk9+Ppj CN0+k6rTxd4vSoSoi6asBNmq1RwPqMhRh1EzdQ7puo1Tr+m28tOoINWC59FE4sQK6Nel68Dd9SWC2 DWQ/LHumA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kq02R-0001fG-Cy; Thu, 17 Dec 2020 20:38:15 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kq02M-0001eS-Va for linux-arm-kernel@lists.infradead.org; Thu, 17 Dec 2020 20:38:12 +0000 Date: Thu, 17 Dec 2020 14:38:06 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1608237488; bh=Rpq08eYW+DA58q5pcS/wXU0VbVBc1vYow6lIlzk55rU=; h=From:To:Cc:Subject:In-Reply-To:From; b=KqE949u41Nqk8wZdC73imrPNhV6iDujEFjRfkVjZScfGg5NLARgNksvDkk54oZI9i mv/u6l2got64jOQ5WYUtngu2q9vI6xjHII+Jcy+PrjjE2gs1K6xgdwztx+nAvI4G2p D/IUTUhGXYUo0T11xN0y5dzNNoaIntqhsq2soJ1qJZmtzmxSv5ozHe2eIvw5XczDhw 7imXx7N9zkX5LZaNE/XBXWbLBfgxWdq6WNk63Vd9f31kXpIWOfBj6C4mP+2GZruhTz M32DBRPOd7HuNC1U2xW9CiDgiKPo9i9u/PExMcMNgvaVJ1cxp2OOgAAkXwohRF2CCU mV7YA0/SGEecA== From: Bjorn Helgaas To: Zhou Wang Subject: Re: [PATCH 0/2] Introduce PCI_FIXUP_IOMMU Message-ID: <20201217203806.GA20785@bjorn-Precision-5520> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <5FD9EE6E.1040505@hisilicon.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201217_153811_467330_F406035A X-CRM114-Status: GOOD ( 30.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pci , Hanjun Guo , jean-philippe , Lorenzo Pieralisi , Herbert Xu , Joerg Roedel , ACPI Devel Maling List , Linux ARM , Zhangfei Gao , Len Brown , Thanu Rangarajan , Souvik Chakravarty , Arnd Bergmann , Bjorn Helgaas , wanghuiqiang , kenneth-lee-2012@foxmail.com, Greg Kroah-Hartman , "Rafael J. Wysocki" , "linux-kernel@vger.kernel.org" , "open list:IOMMU DRIVERS" , "open list:HARDWARE RANDOM NUMBER GENERATOR CORE" , Sudeep Holla Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Dec 16, 2020 at 07:24:30PM +0800, Zhou Wang wrote: > On 2020/6/23 23:04, Bjorn Helgaas wrote: > > On Fri, Jun 19, 2020 at 10:26:54AM +0800, Zhangfei Gao wrote: > >> Have studied _DSM method, two issues we met comparing using quirk. > >> > >> 1. Need change definition of either pci_host_bridge or pci_dev, like adding > >> member can_stall, > >> while pci system does not know stall now. > >> > >> a, pci devices do not have uuid: uuid need be described in dsdt, while pci > >> devices are not defined in dsdt. > >> so we have to use host bridge. > > > > PCI devices *can* be described in the DSDT. IIUC these particular > > devices are hardwired (not plug-in cards), so platform firmware can > > know about them and could describe them in the DSDT. > > > >> b, Parsing dsdt is in in pci subsystem. > >> Like drivers/acpi/pci_root.c: > >> obj = acpi_evaluate_dsm(ACPI_HANDLE(bus->bridge), &pci_acpi_dsm_guid, > >> 1, > >> IGNORE_PCI_BOOT_CONFIG_DSM, NULL); > >> > >> After parsing DSM in pci, we need record this info. > >> Currently, can_stall info is recorded in iommu_fwspec, > >> which is allocated in iommu_fwspec_init and called by iort_iommu_configure > >> for uefi. > > > > You can look for a _DSM wherever it is convenient for you. It could > > be in an AMBA shim layer. > > > >> 2. Guest kernel also need support sva. > >> Using quirk, the guest can boot with sva enabled, since quirk is > >> self-contained by kernel. > >> If using _DSM, a specific uefi or dtb has to be provided, > >> currently we can useQEMU_EFI.fd from apt install qemu-efi > > > > I don't quite understand what this means, but as I mentioned before, a > > quirk for a *limited* number of devices is OK, as long as there is a > > plan that removes the need for a quirk for future devices. > > > > E.g., if the next platform version ships with a DTB or firmware with a > > _DSM or other mechanism that enables the kernel to discover this > > information without a kernel change, it's fine to use a quirk to cover > > the early platform. > > > > The principles are: > > > > - I don't want to have to update a quirk for every new Device ID > > that needs this. > > Hi Bjorn and Zhangfei, > > We plan to use ATS/PRI to support SVA in future PCI devices. However, for > current devices, we need to add limited number of quirk to let them > work. The device IDs of current quirk needed devices are ZIP engine(0xa250, 0xa251), > SEC engine(0xa255, 0xa256), HPRE engine(0xa258, 0xa259), revision id are > 0x21 and 0x30. > > Let's continue to upstream these quirks! Please post the patches you propose. I don't think the previous ones are in my queue. Please include the lore URL for the previous posting(s) in the cover letter so we can connect the discussion. > > - I don't really want to have to manage non-PCI information in the > > struct pci_dev. If this is AMBA- or IOMMU-related, it should be > > stored in a structure related to AMBA or the IOMMU. > > . > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel