From: Kishon Vijay Abraham I <kishon@ti.com>
To: Kishon Vijay Abraham I <kishon@ti.com>,
Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Swapnil Jakhade <sjakhade@cadence.com>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Cc: Nishanth Menon <nm@ti.com>, Philipp Zabel <p.zabel@pengutronix.de>
Subject: [PATCH v2 08/14] phy: cadence: cadence-sierra: Explicitly request exclusive reset control
Date: Tue, 22 Dec 2020 12:35:14 +0530 [thread overview]
Message-ID: <20201222070520.28132-9-kishon@ti.com> (raw)
In-Reply-To: <20201222070520.28132-1-kishon@ti.com>
No functional change. Since the reset controls obtained in
Sierra is exclusively used by the Sierra device, use
exclusive reset control request API calls.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
drivers/phy/cadence/phy-cadence-sierra.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c
index 935f165404e4..44c52a0842dc 100644
--- a/drivers/phy/cadence/phy-cadence-sierra.c
+++ b/drivers/phy/cadence/phy-cadence-sierra.c
@@ -514,14 +514,14 @@ static int cdns_sierra_phy_get_resets(struct cdns_sierra_phy *sp,
{
struct reset_control *rst;
- rst = devm_reset_control_get(dev, "sierra_reset");
+ rst = devm_reset_control_get_exclusive(dev, "sierra_reset");
if (IS_ERR(rst)) {
dev_err(dev, "failed to get reset\n");
return PTR_ERR(rst);
}
sp->phy_rst = rst;
- rst = devm_reset_control_get_optional(dev, "sierra_apb");
+ rst = devm_reset_control_get_optional_exclusive(dev, "sierra_apb");
if (IS_ERR(rst)) {
dev_err(dev, "failed to get apb reset\n");
return PTR_ERR(rst);
--
2.17.1
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next prev parent reply other threads:[~2020-12-22 7:10 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-22 7:05 [PATCH v2 00/14] PHY: Add support in Sierra to use external clock Kishon Vijay Abraham I
2020-12-22 7:05 ` [PATCH v2 01/14] phy: cadence: Sierra: Fix PHY power_on sequence Kishon Vijay Abraham I
2020-12-22 7:05 ` [PATCH v2 02/14] phy: ti: j721e-wiz: Invoke wiz_init() before of_platform_device_create() Kishon Vijay Abraham I
2020-12-22 7:05 ` [PATCH v2 03/14] dt-bindings: phy: cadence-sierra: Add bindings for the PLLs within SERDES Kishon Vijay Abraham I
2020-12-22 7:05 ` [PATCH v2 04/14] phy: ti: j721e-wiz: Get PHY properties only for "phy" or "link" subnode Kishon Vijay Abraham I
2020-12-22 7:05 ` [PATCH v2 05/14] phy: cadence: cadence-sierra: Create PHY only for "phy" or "link" sub-nodes Kishon Vijay Abraham I
2020-12-22 7:05 ` [PATCH v2 06/14] phy: cadence: cadence-sierra: Move all clk_get_*() to a separate function Kishon Vijay Abraham I
2020-12-22 7:05 ` [PATCH v2 07/14] phy: cadence: cadence-sierra: Move all reset_control_get*() " Kishon Vijay Abraham I
2020-12-22 7:05 ` Kishon Vijay Abraham I [this message]
2020-12-22 7:05 ` [PATCH v2 09/14] phy: cadence: sierra: Model reference receiver as clocks (gate clocks) Kishon Vijay Abraham I
2020-12-23 19:00 ` kernel test robot
2020-12-23 22:45 ` kernel test robot
2020-12-22 7:05 ` [PATCH v2 10/14] phy: cadence: sierra: Enable pll_cmnlc and pll_cmnlc1 clocks Kishon Vijay Abraham I
2020-12-22 7:05 ` [PATCH v2 11/14] arm64: dts: ti: k3-j721e-main: Add DT nodes for clocks within Sierra SERDES Kishon Vijay Abraham I
2020-12-22 7:05 ` [PATCH v2 12/14] arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES Kishon Vijay Abraham I
2020-12-22 7:05 ` [PATCH v2 13/14] arm64: dts: ti: k3-j721e-common-proc-board: Use external clock for SERDES Kishon Vijay Abraham I
2020-12-22 7:05 ` [PATCH v2 14/14] arm64: dts: ti: k3-j721e-common-proc-board: Re-name "link" name as "phy" Kishon Vijay Abraham I
2021-01-25 11:31 ` [PATCH v2 00/14] PHY: Add support in Sierra to use external clock Kishon Vijay Abraham I
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