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Sun, 03 Jan 2021 08:58:45 -0800 (PST) Received: from robh.at.kernel.org ([64.188.179.253]) by smtp.gmail.com with ESMTPSA id r10sm39086113ilo.34.2021.01.03.08.58.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 03 Jan 2021 08:58:44 -0800 (PST) Received: (nullmailer pid 4046180 invoked by uid 1000); Sun, 03 Jan 2021 16:58:42 -0000 Date: Sun, 3 Jan 2021 09:58:42 -0700 From: Rob Herring To: EastL Lee Subject: Re: [PATCH v8 1/4] dt-bindings: dmaengine: Add MediaTek Command-Queue DMA controller bindings Message-ID: <20210103165842.GA4024251@robh.at.kernel.org> References: <1608715847-28956-1-git-send-email-EastL.Lee@mediatek.com> <1608715847-28956-2-git-send-email-EastL.Lee@mediatek.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1608715847-28956-2-git-send-email-EastL.Lee@mediatek.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210103_115846_528998_3296F9F3 X-CRM114-Status: GOOD ( 21.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, cc.hwang@mediatek.com, wsd_upstream@mediatek.com, Sean Wang , linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, vkoul@kernel.org, linux-mediatek@lists.infradead.org, matthias.bgg@gmail.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Dec 23, 2020 at 05:30:44PM +0800, EastL Lee wrote: > Document the devicetree bindings for MediaTek Command-Queue DMA controller > which could be found on MT6779 SoC or other similar Mediatek SoCs. > > Signed-off-by: EastL Lee > --- > .../devicetree/bindings/dma/mtk-cqdma.yaml | 104 +++++++++++++++++++++ Use compatible string for filename: mediatek,cqdma.yaml > 1 file changed, 104 insertions(+) > create mode 100644 Documentation/devicetree/bindings/dma/mtk-cqdma.yaml > > diff --git a/Documentation/devicetree/bindings/dma/mtk-cqdma.yaml b/Documentation/devicetree/bindings/dma/mtk-cqdma.yaml > new file mode 100644 > index 0000000..a76a263 > --- /dev/null > +++ b/Documentation/devicetree/bindings/dma/mtk-cqdma.yaml > @@ -0,0 +1,104 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/dma/mtk-cqdma.yaml# Don't forget to update this. > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MediaTek Command-Queue DMA controller Device Tree Binding > + > +maintainers: > + - EastL Lee > + > +description: > + MediaTek Command-Queue DMA controller (CQDMA) on Mediatek SoC > + is dedicated to memory-to-memory transfer through queue based > + descriptor management. > + > +allOf: > + - $ref: "dma-controller.yaml#" > + > +properties: > + compatible: > + items: > + - enum: > + - mediatek,mt6765-cqdma > + - mediatek,mt6779-cqdma > + - const: mediatek,cqdma > + > + reg: > + minItems: 1 > + maxItems: 5 > + description: > + A base address of MediaTek Command-Queue DMA controller, > + a channel will have a set of base address. > + > + interrupts: > + minItems: 1 > + maxItems: 5 > + description: > + A interrupt number of MediaTek Command-Queue DMA controller, > + one interrupt number per dma-channels. > + > + clocks: > + maxItems: 1 > + > + clock-names: > + const: cqdma > + > + dma-channel-mask: > + description: > + For DMA capability, We will know the addressing capability of > + MediaTek Command-Queue DMA controller through dma-channel-mask. > + minimum: 1 > + maximum: 63 Indentation is wrong here so this has no effect. A mask of 63 is 6 channels... > + > + dma-channels: > + description: > + Number of DMA channels supported by MediaTek Command-Queue DMA > + controller, support up to five. > + minimum: 1 > + maximum: 5 Same here. Do you really need both dma-channels and dma-channel-mask? You should be able to get one from the other. > + > + dma-requests: > + description: > + Number of DMA request (virtual channel) supported by MediaTek > + Command-Queue DMA controller, support up to 32. > + minimum: 1 > + maximum: 32 And here. You are missing '#dma-cells' also. > + > +required: > + - "#dma-cells" > + - compatible > + - reg > + - interrupts > + - clocks > + - clock-names > + - dma-channel-mask > + - dma-channels > + - dma-requests > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + #include > + cqdma: dma-controller@10212000 { > + compatible = "mediatek,mt6779-cqdma"; This should fail validation because it doesn't match the schema. You ran 'make dt_binding_check', right? > + reg = <0x10212000 0x80>, > + <0x10212080 0x80>, > + <0x10212100 0x80>; > + interrupts = , > + , > + ; > + clocks = <&infracfg_ao CLK_INFRA_CQ_DMA>; > + clock-names = "cqdma"; > + dma-channel-mask = <63>; 6 channels or... > + dma-channels = <3>; 3? > + dma-requests = <32>; > + #dma-cells = <1>; > + }; > + > +... > -- > 1.9.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel