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From: Bjorn Helgaas <helgaas@kernel.org>
To: Jim Quinlan <jim2101024@gmail.com>
Cc: "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
	<linux-arm-kernel@lists.infradead.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	linux-pci <linux-pci@vger.kernel.org>,
	open list <linux-kernel@vger.kernel.org>,
	Mark Brown <broonie@kernel.org>,
	bcm-kernel-feedback-list <bcm-kernel-feedback-list@broadcom.com>,
	"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
	<linux-rpi-kernel@lists.infradead.org>,
	Jim Quinlan <james.quinlan@broadcom.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Subject: Re: [PATCH v2 5/6] PCI: brcmstb: Add panic/die handler to RC driver
Date: Wed, 6 Jan 2021 17:11:39 -0600	[thread overview]
Message-ID: <20210106231139.GA1350432@bjorn-Precision-5520> (raw)
In-Reply-To: <CANCKTBt7C+EhcpbgYdreK=xvQuOzEaDm+us-6P+PtoEfCny2Vg@mail.gmail.com>

On Wed, Jan 06, 2021 at 02:57:19PM -0500, Jim Quinlan wrote:
> On Wed, Jan 6, 2021 at 2:42 PM Jim Quinlan <james.quinlan@broadcom.com> wrote:
> >
> > ---------- Forwarded message ---------
> > From: Bjorn Helgaas <helgaas@kernel.org>
> > Date: Wed, Jan 6, 2021 at 2:19 PM
> > Subject: Re: [PATCH v2 5/6] PCI: brcmstb: Add panic/die handler to RC driver
> > To: Jim Quinlan <james.quinlan@broadcom.com>
> > Cc: <linux-pci@vger.kernel.org>, Nicolas Saenz Julienne
> > <nsaenzjulienne@suse.de>, <broonie@kernel.org>,
> > <bcm-kernel-feedback-list@broadcom.com>, Lorenzo Pieralisi
> > <lorenzo.pieralisi@arm.com>, Rob Herring <robh@kernel.org>, Bjorn
> > Helgaas <bhelgaas@google.com>, Florian Fainelli
> > <f.fainelli@gmail.com>, moderated list:BROADCOM BCM2711/BCM2835 ARM
> > ARCHITECTURE <linux-rpi-kernel@lists.infradead.org>, moderated
> > list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
> > <linux-arm-kernel@lists.infradead.org>, open list
> > <linux-kernel@vger.kernel.org>
> >
> >
> > On Mon, Nov 30, 2020 at 04:11:42PM -0500, Jim Quinlan wrote:
> > > Whereas most PCIe HW returns 0xffffffff on illegal accesses and the like,
> > > by default Broadcom's STB PCIe controller effects an abort.  This simple
> > > handler determines if the PCIe controller was the cause of the abort and if
> > > so, prints out diagnostic info.
> > >
> > > Example output:
> > >   brcm-pcie 8b20000.pcie: Error: Mem Acc: 32bit, Read, @0x38000000
> > >   brcm-pcie 8b20000.pcie:  Type: TO=0 Abt=0 UnspReq=1 AccDsble=0 BadAddr=0
> >
> > What does this mean for all the other PCI core code that expects
> > 0xffffffff data returns?  Does it work?  Does it break differently on
> > STB than on other platforms?
> Hi Bjorn,
> 
> Our PCIe HW causes a CPU abort when this happens.  Occasionally a
> customer will have a fault handler try to fix up the abort and
> continue on, but we recommend solving the root problem.  This commit
> just gives us a chance to glean info about the problem.  Our newer
> SOCs have a mode that doesn't abort and instead returns 0xffffffff.
> 
> BTW, can you point me to example files where "PCI core code that
> expects  0xffffffff data returns" [on bad accesses]?

The most important case is during enumeration.  A config read to a
device that doesn't exist normally terminates as an Unsupported
Request, and pci_bus_generic_read_dev_vendor_id() depends on reading
0xffffffff in that case.  I assume this particular case does work that
way for brcm-pcie, because I assume enumeration does work.

pci_cfg_space_size_ext() is similar.  I assume this also works for
brcm-pcie for the same reason.

pci_raw_set_power_state() looks for ~0, which it may see if it does a
config read to a device in D3cold.  pci_dev_wait(), dpc_irq(),
pcie_pme_work_fn(), pcie_pme_irq() are all similar.

Yes, this is ugly and we should check for these more consistently.

The above are all for config reads.  The PCI core doesn't do MMIO
accesses except for a few cases like MSI-X.  But drivers do, and if
they check for PCIe errors on MMIO reads, they do it by looking for
0xffffffff, e.g., pci_mmio_enabled() (in hfi1),
qib_pci_mmio_enabled(), bnx2x_get_hwinfo(), etc.

Bjorn

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  reply	other threads:[~2021-01-06 23:14 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-30 21:11 [PATCH v2 0/6] brcmstb: add EP regulators and panic handler Jim Quinlan
2020-11-30 21:11 ` [PATCH v2 1/6] dt-bindings: PCI: Add bindings for Brcmstb EP voltage regulators Jim Quinlan
2020-12-09 14:01   ` Rob Herring
2021-01-04 22:12     ` Jim Quinlan
2021-01-05 14:01       ` Mark Brown
2021-01-05 15:09         ` Jim Quinlan
2021-01-05 15:33           ` Mark Brown
2021-01-07 22:31       ` Rob Herring
2020-11-30 21:11 ` [PATCH v2 2/6] PCI: brcmstb: Add control of EP voltage regulator(s) Jim Quinlan
2020-11-30 21:32   ` Florian Fainelli
2020-11-30 21:11 ` [PATCH v2 3/6] PCI: brcmstb: Do not turn off regulators if EP can wake up Jim Quinlan
2020-11-30 21:29   ` Florian Fainelli
2020-11-30 21:11 ` [PATCH v2 4/6] PCI: brcmstb: Give 7216 SOCs their own config type Jim Quinlan
2020-11-30 21:24   ` Florian Fainelli
2020-11-30 21:11 ` [PATCH v2 5/6] PCI: brcmstb: Add panic/die handler to RC driver Jim Quinlan
2020-11-30 21:28   ` Florian Fainelli
2020-12-01 18:05   ` Bjorn Helgaas
2020-12-01 20:12     ` Jim Quinlan
2021-01-06 19:19   ` Bjorn Helgaas
     [not found]     ` <CA+-6iNzARUT63Mv7qFzk_g5wep4v6aPuN8f8yjQcgozVcKhVTw@mail.gmail.com>
2021-01-06 19:57       ` Jim Quinlan
2021-01-06 23:11         ` Bjorn Helgaas [this message]
2020-11-30 21:11 ` [PATCH v2 6/6] PCI: brcmstb: check return value of clk_prepare_enable() Jim Quinlan
2020-11-30 21:24   ` Florian Fainelli
2021-01-06 19:19 ` [PATCH v2 0/6] brcmstb: add EP regulators and panic handler Bjorn Helgaas

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