From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 32898C433DB for ; Mon, 11 Jan 2021 18:43:49 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C3E902251F for ; Mon, 11 Jan 2021 18:43:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C3E902251F Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=HQS7I5gK96ns/R+EA2YWTagPyYTGmkkuZLTnKVSgVtk=; b=MBWdPmr88UYPh5sVVnUZyr3yl psc+aa+3GArvIdS8mScEdf6h/loGIAjej4fLZ3N6RH6rhvykyF4f8Ffx+ywJ+wS6feyyr7ThPJvje xfxmrIPTqbE7N2UDGj1VSNHd6ZMVxNZjKfwZmLtDqTqEJg+4V4N4HxjVnxZiAh6b6jhBhFrI2563J AvRIZwCkX5hLQbMifIye4m5pzwgqXlbaSa1CahvBs3Lf7tRpRxfN0H4qYO60no0IOpfuJjFfii7sx BzoO7FjTFUBE7WeHw7k6IBOoSuU2fpKyAjIQeDITVYwitMpuIb6IEgqV6PrhBVWKN5gpLJ0wu9ely G+aKrYjbg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kz28j-0004F4-4X; Mon, 11 Jan 2021 18:42:05 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kz28f-0004EB-KN for linux-arm-kernel@lists.infradead.org; Mon, 11 Jan 2021 18:42:02 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id 65CE22251F; Mon, 11 Jan 2021 18:41:57 +0000 (UTC) Date: Mon, 11 Jan 2021 18:41:54 +0000 From: Catalin Marinas To: Marc Zyngier Subject: Re: [PATCH v3 09/21] arm64: cpufeature: Add global feature override facility Message-ID: <20210111184154.GC17941@gaia> References: <20210111132811.2455113-1-maz@kernel.org> <20210111132811.2455113-10-maz@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210111132811.2455113-10-maz@kernel.org> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210111_134201_790207_CBFF87A0 X-CRM114-Status: GOOD ( 14.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Jing Zhang , Prasad Sodagudi , Srinivas Ramana , Suzuki K Poulose , Alexandru Elisei , linux-kernel@vger.kernel.org, Ard Biesheuvel , James Morse , Julien Thierry , Ajay Patil , kernel-team@android.com, David Brazdil , Will Deacon , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Marc, On Mon, Jan 11, 2021 at 01:27:59PM +0000, Marc Zyngier wrote: > Add a facility to globally override a feature, no matter what > the HW says. Yes, this is dangerous. Yeah, it's dangerous. We can make it less so if we only allow safe values (e.g. lower if FTR_UNSIGNED). > diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h > index 9a555809b89c..465d2cb63bfc 100644 > --- a/arch/arm64/include/asm/cpufeature.h > +++ b/arch/arm64/include/asm/cpufeature.h > @@ -75,6 +75,8 @@ struct arm64_ftr_reg { > u64 sys_val; > u64 user_val; > const struct arm64_ftr_bits *ftr_bits; > + u64 *override_val; > + u64 *override_mask; > }; At the arm64_ftr_reg level, we don't have any information about the safe values for a feature. Could we instead move this to arm64_ftr_bits? We probably only need a single field. When populating the feature values, we can make sure it doesn't go above the hardware one. I attempted a feature modification for MTE here, though I dropped the entire series in the meantime as we clarified the ARM ARM: https://lore.kernel.org/linux-arm-kernel/20200515171612.1020-24-catalin.marinas@arm.com/ Srinivas copied it in his patch (but forgot to give credit ;)): https://lore.kernel.org/linux-arm-msm/1610152163-16554-3-git-send-email-sramana@codeaurora.org/ The above adds a filter function but, instead, just use your mechanism in this series for idreg.feature setting via cmdline. The arm64_ftr_value() function extracts the hardware value and lowers it if a cmdline argument was passed. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel