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Received: from shell.armlinux.org.uk ([fd8f:7570:feb6:1:5054:ff:fe00:4ec]:47834) by pandora.armlinux.org.uk with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1l00AZ-0002Kq-Dp; Thu, 14 Jan 2021 10:47:59 +0000 Received: from linux by shell.armlinux.org.uk with local (Exim 4.92) (envelope-from ) id 1l00AY-0008HK-Lo; Thu, 14 Jan 2021 10:47:58 +0000 Date: Thu, 14 Jan 2021 10:47:58 +0000 From: Russell King - ARM Linux admin To: Marc Kleine-Budde Subject: Re: [PATCH] ARM: dts: imx6qdl-sr-som: fix some cubox-i platforms Message-ID: <20210114104758.GQ1551@shell.armlinux.org.uk> References: <9cf5e6d3-15c4-04d6-cdfe-dd40d5e17eb4@pengutronix.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <9cf5e6d3-15c4-04d6-cdfe-dd40d5e17eb4@pengutronix.de> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210114_054805_463771_64C869BF X-CRM114-Status: GOOD ( 25.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Fabio Estevam , Sascha Hauer , Rob Herring , NXP Linux Team , Pengutronix Kernel Team , Shawn Guo , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Jan 14, 2021 at 11:37:47AM +0100, Marc Kleine-Budde wrote: > On 1/14/21 11:36 AM, Russell King wrote: > > The PHY address bit 2 is configured by the LED pin. Attaching a LED > > to this pin is not sufficient to guarantee this configuration pin is > > correctly read. This leads to some platforms having their PHY at > > address 0 and others at address 4. > > > > If there is no phy-handle specified, the FEC driver will scan the PHY > > bus for a PHY and use that. Consequently, adding the DT configuration > > of the PHY and the phy properties to the FEC driver broke some boards. > > > > Fix this by removing the phy-handle property, and listing two PHY > > entries for both possible PHY addresses, so that the DT configuration > > for the PHY can be found by the PHY driver. > > > > Fixes: 86b08bd5b994 ("ARM: dts: imx6-sr-som: add ethernet PHY configuration") > > Reported-by: Christoph Mattheis > > Signed-off-by: Russell King > > --- > > arch/arm/boot/dts/imx6qdl-sr-som.dtsi | 11 +++++++++-- > > 1 file changed, 9 insertions(+), 2 deletions(-) > > > > diff --git a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi > > index b06577808ff4..bba21dfef103 100644 > > --- a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi > > +++ b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi > > @@ -53,7 +53,6 @@ > > &fec { > > pinctrl-names = "default"; > > pinctrl-0 = <&pinctrl_microsom_enet_ar8035>; > > - phy-handle = <&phy>; > > phy-mode = "rgmii-id"; > > phy-reset-duration = <2>; > > phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; > > @@ -63,7 +62,15 @@ > > #address-cells = <1>; > > #size-cells = <0>; > > > > - phy: ethernet-phy@0 { > > + /* > > + * The PHY can appear at either address 0 or 4 due to the > > + * configuration (LED) pin not being pulled sufficiently. > > + */ > > + ethernet-phy@0 { > > + reg = <0>; > > + qca,clk-out-frequency = <125000000>; > > + }; > > + ethernet-phy@4 { > > reg = <0>; > ^ > 4? Yes of course, thanks for spotting so quickly. -- RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last! _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel