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spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=2ylGwPj9MElRvO5EpWKPrLnVDv5B0AIfI0/UloJwxNw=; b=0i3a9BycDuibcZXADZ0EIx5dp p9tjPg1vmKXhujV0Eke8DlRqO39t9fYNlFUvf+zlgvwOCGcwA1+YdFfuYupv5ZCno8jBx3nOGNJ5Y yKbv9kg6W4uzSe6TOA4z0FIpvXMtIrlMj/qtkcK7xjX85cu0EXS0JC9F+eYByaC9MYPKaRuIs5Kt9 fBdiF4Gxj5UpTLczgU5b2iV2X/Fd54uBELXEpAyTwxF9P8l7PFOT5HQp7iunkwRywgf1/AX/TUSM3 Bb+K6s6KiDnq/VTs0V5plcRDqmfNu2fcVxFEarIkUpKv3BwNetdtwpMhAxw90D3fqPK19oFhOeug1 fNqmn9obQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l03Yz-00069N-HH; Thu, 14 Jan 2021 14:25:25 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1l03Yt-00068U-Lt for linux-arm-kernel@lists.infradead.org; Thu, 14 Jan 2021 14:25:24 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id 1090A208C3; Thu, 14 Jan 2021 14:25:15 +0000 (UTC) Date: Thu, 14 Jan 2021 14:25:13 +0000 From: Catalin Marinas To: Vincenzo Frascino Subject: Re: [PATCH v2 3/4] arm64: mte: Enable async tag check fault Message-ID: <20210114142512.GB16561@gaia> References: <20210107172908.42686-1-vincenzo.frascino@arm.com> <20210107172908.42686-4-vincenzo.frascino@arm.com> <20210113181121.GF27045@gaia> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210114_092519_810094_D87C2DF6 X-CRM114-Status: GOOD ( 18.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Branislav Rankov , Marco Elver , Andrey Konovalov , Evgenii Stepanov , linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, Alexander Potapenko , linux-arm-kernel@lists.infradead.org, Andrey Ryabinin , Will Deacon , Dmitry Vyukov Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Jan 14, 2021 at 10:24:25AM +0000, Vincenzo Frascino wrote: > On 1/13/21 6:11 PM, Catalin Marinas wrote: > > On Thu, Jan 07, 2021 at 05:29:07PM +0000, Vincenzo Frascino wrote: > >> static inline void mte_sync_tags(pte_t *ptep, pte_t pte) > >> { > >> } > >> diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c > >> index 5346953e4382..74b020ce72d7 100644 > >> --- a/arch/arm64/kernel/entry-common.c > >> +++ b/arch/arm64/kernel/entry-common.c > >> @@ -37,6 +37,8 @@ static void noinstr enter_from_kernel_mode(struct pt_regs *regs) > >> lockdep_hardirqs_off(CALLER_ADDR0); > >> rcu_irq_enter_check_tick(); > >> trace_hardirqs_off_finish(); > >> + > >> + mte_check_tfsr_el1(); > >> } > >> > >> /* > >> @@ -47,6 +49,8 @@ static void noinstr exit_to_kernel_mode(struct pt_regs *regs) > >> { > >> lockdep_assert_irqs_disabled(); > >> > >> + mte_check_tfsr_el1(); > >> + > >> if (interrupts_enabled(regs)) { > >> if (regs->exit_rcu) { > >> trace_hardirqs_on_prepare(); > >> @@ -243,6 +247,8 @@ asmlinkage void noinstr enter_from_user_mode(void) > >> > >> asmlinkage void noinstr exit_to_user_mode(void) > >> { > >> + mte_check_tfsr_el1(); > > > > While for kernel entry the asynchronous faults are sync'ed automatically > > with TFSR_EL1, we don't have this for exit, so we'd need an explicit > > DSB. But rather than placing it here, it's better if we add a bool sync > > argument to mte_check_tfsr_el1() which issues a dsb() before checking > > the register. I think that's the only place where such argument would be > > true (for now). > > Good point, I will add the dsb() in mte_check_tfsr_el1() but instead of a bool > parameter I will add something more explicit. Or rename the function to mte_check_tfsr_el1_no_sync() and have a static inline mte_check_tfsr_el1() which issues a dsb() before calling the *no_sync variant. Adding an enum instead here is not worth it (if that's what you meant by not using a bool). -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel