From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CFAE0C433DB for ; Mon, 18 Jan 2021 02:12:28 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 57DE52251E for ; Mon, 18 Jan 2021 02:12:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 57DE52251E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:References:In-Reply-To:Message-Id:Date:Subject:To: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=RDgLId0r+ailzVrcLUYx434xa3aHjlKpID6HxEt5bo8=; b=vjZI3Bri77EWIBMjL5PGCgopCq 3of/tP0Qo/99u1ERiabt4v5w28lnbNmdmmfff99OFUs+sVmbGFacChrrmZ64gwZ8r1o25zU2VWAmT liGlDLXgbZp8eS63qjeP8LyZ7PnylbgwhErMnNUF1pPYvSIRwK0ur20oGnBrD76L0LTDV24iM8kLx Z3aYy4lg4YqgYjU87KP09nkkJctcXg5vu/cc0i1gmgC55URxBfFxUntQTba9/GB72xvI0KP0KGewg zzMGp101CAH3QvnrlDigrfWcVuAd06UCzsrKzzK+e3vqA86hvsTkoPCVlppZSn1uGuO9hUVPF3M0l 5NlOIdtw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l1K0K-0005AK-Ir; Mon, 18 Jan 2021 02:10:52 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l1JzO-0004o4-4Q for linux-arm-kernel@lists.infradead.org; Mon, 18 Jan 2021 02:09:55 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7252F1424; Sun, 17 Jan 2021 18:09:48 -0800 (PST) Received: from localhost.localdomain (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 73AD63F719; Sun, 17 Jan 2021 18:09:46 -0800 (PST) From: Andre Przywara To: Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec Subject: [PATCH v3 09/21] mfd: axp20x: Allow AXP chips without interrupt lines Date: Mon, 18 Jan 2021 02:08:36 +0000 Message-Id: <20210118020848.11721-10-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20210118020848.11721-1-andre.przywara@arm.com> References: <20210118020848.11721-1-andre.przywara@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210117_210954_265848_6F6B9255 X-CRM114-Status: GOOD ( 13.66 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Samuel Holland , Yangtao Li , Linus Walleij , linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= , Shuosheng Huang , Lee Jones , linux-arm-kernel@lists.infradead.org, Icenowy Zheng MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Currently the AXP chip requires to have its IRQ line connected to some interrupt controller, and will fail probing when this is not the case. On a new Allwinner SoC (H616) there is no NMI pin anymore, so the interrupt functionality of the AXP chip is simply not available. Check whether the DT describes the AXP chip as an interrupt controller before trying to register the irqchip, to avoid probe failures on setups without an interrupt. Signed-off-by: Andre Przywara --- drivers/mfd/axp20x.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c index aa59496e4376..a52595c49d40 100644 --- a/drivers/mfd/axp20x.c +++ b/drivers/mfd/axp20x.c @@ -959,12 +959,17 @@ int axp20x_device_probe(struct axp20x_dev *axp20x) AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE); } - ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq, - IRQF_ONESHOT | IRQF_SHARED | axp20x->irq_flags, - -1, axp20x->regmap_irq_chip, &axp20x->regmap_irqc); - if (ret) { - dev_err(axp20x->dev, "failed to add irq chip: %d\n", ret); - return ret; + if (!axp20x->dev->of_node || + of_property_read_bool(axp20x->dev->of_node, "interrupt-controller")) { + ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq, + IRQF_ONESHOT | IRQF_SHARED | axp20x->irq_flags, + -1, axp20x->regmap_irq_chip, + &axp20x->regmap_irqc); + if (ret) { + dev_err(axp20x->dev, "failed to add irq chip: %d\n", + ret); + return ret; + } } ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells, -- 2.17.5 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel