From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>,
Jing Zhang <jingzhangos@google.com>,
Prasad Sodagudi <psodagud@codeaurora.org>,
Srinivas Ramana <sramana@codeaurora.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
James Morse <james.morse@arm.com>,
Ajay Patil <pajay@qti.qualcomm.com>,
kernel-team@android.com, David Brazdil <dbrazdil@google.com>,
Will Deacon <will@kernel.org>, Ard Biesheuvel <ardb@kernel.org>,
Julien Thierry <julien.thierry.kdev@gmail.com>
Subject: [PATCH v4 21/21] arm64: cpufeatures: Allow disabling of Pointer Auth from the command-line
Date: Mon, 18 Jan 2021 09:45:33 +0000 [thread overview]
Message-ID: <20210118094533.2874082-22-maz@kernel.org> (raw)
In-Reply-To: <20210118094533.2874082-1-maz@kernel.org>
In order to be able to disable Pointer Authentication at runtime,
whether it is for testing purposes, or to work around HW issues,
let's add support for overriding the ID_AA64ISAR1_EL1.{GPI,GPA,API,APA}
fields.
This is further mapped on the arm64.nopauth command-line alias.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
Documentation/admin-guide/kernel-parameters.txt | 3 +++
arch/arm64/include/asm/cpufeature.h | 2 ++
arch/arm64/kernel/cpufeature.c | 5 ++++-
arch/arm64/kernel/idreg-override.c | 17 +++++++++++++++++
4 files changed, 26 insertions(+), 1 deletion(-)
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 7599fd0f1ad7..f9cb28a39bd0 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -376,6 +376,9 @@
arm64.nobti [ARM64] Unconditionally disable Branch Target
Identification support
+ arm64.nopauth [ARM64] Unconditionally disable Pointer Authentication
+ support
+
ataflop= [HW,M68k]
atarimouse= [HW,MOUSE] Atari Mouse
diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
index d3e0f6dd43c4..9d8dcf380ad5 100644
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -818,6 +818,8 @@ extern u64 id_aa64mmfr1_val;
extern u64 id_aa64mmfr1_mask;
extern u64 id_aa64pfr1_val;
extern u64 id_aa64pfr1_mask;
+extern u64 id_aa64isar1_val;
+extern u64 id_aa64isar1_mask;
u32 get_kvm_ipa_limit(void);
void dump_cpu_features(void);
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index f223171a7c34..f5ba7fd615b5 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -559,6 +559,8 @@ u64 id_aa64mmfr1_val;
u64 id_aa64mmfr1_mask;
u64 id_aa64pfr1_val;
u64 id_aa64pfr1_mask;
+u64 id_aa64isar1_val;
+u64 id_aa64isar1_mask;
static const struct __ftr_reg_entry {
u32 sys_id;
@@ -604,7 +606,8 @@ static const struct __ftr_reg_entry {
/* Op1 = 0, CRn = 0, CRm = 6 */
ARM64_FTR_REG(SYS_ID_AA64ISAR0_EL1, ftr_id_aa64isar0),
- ARM64_FTR_REG(SYS_ID_AA64ISAR1_EL1, ftr_id_aa64isar1),
+ ARM64_FTR_REG_OVERRIDE(SYS_ID_AA64ISAR1_EL1, ftr_id_aa64isar1,
+ &id_aa64isar1_val, &id_aa64isar1_mask),
/* Op1 = 0, CRn = 0, CRm = 7 */
ARM64_FTR_REG(SYS_ID_AA64MMFR0_EL1, ftr_id_aa64mmfr0),
diff --git a/arch/arm64/kernel/idreg-override.c b/arch/arm64/kernel/idreg-override.c
index a9e3ed193fd4..7037c9b214d0 100644
--- a/arch/arm64/kernel/idreg-override.c
+++ b/arch/arm64/kernel/idreg-override.c
@@ -43,6 +43,19 @@ static const struct reg_desc pfr1 __initdata = {
},
};
+static const struct reg_desc isar1 __initdata = {
+ .name = "id_aa64isar1",
+ .val = &id_aa64isar1_val,
+ .mask = &id_aa64isar1_mask,
+ .fields = {
+ { "gpi", ID_AA64ISAR1_GPI_SHIFT },
+ { "gpa", ID_AA64ISAR1_GPA_SHIFT },
+ { "api", ID_AA64ISAR1_API_SHIFT },
+ { "apa", ID_AA64ISAR1_APA_SHIFT },
+ {}
+ },
+};
+
extern u64 kaslr_feature_val;
extern u64 kaslr_feature_mask;
@@ -61,6 +74,7 @@ static const struct reg_desc kaslr __initdata = {
static const struct reg_desc * const regs[] __initdata = {
&mmfr1,
&pfr1,
+ &isar1,
&kaslr,
};
@@ -71,6 +85,9 @@ static const struct {
{ "kvm-arm.mode=nvhe", "id_aa64mmfr1.vh=0" },
{ "kvm-arm.mode=protected", "id_aa64mmfr1.vh=0" },
{ "arm64.nobti", "id_aa64pfr1.bt=0" },
+ { "arm64.nopauth",
+ "id_aa64isar1.gpi=0 id_aa64isar1.gpa=0 "
+ "id_aa64isar1.api=0 id_aa64isar1.apa=0" },
{ "nokaslr", "kaslr.disabled=1" },
};
--
2.29.2
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next prev parent reply other threads:[~2021-01-18 10:01 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-18 9:45 [PATCH v4 00/21] arm64: Early CPU feature override, and applications to VHE, BTI and PAuth Marc Zyngier
2021-01-18 9:45 ` [PATCH v4 01/21] arm64: Fix labels in el2_setup macros Marc Zyngier
2021-01-18 11:13 ` David Brazdil
2021-01-18 9:45 ` [PATCH v4 02/21] arm64: Fix outdated TCR setup comment Marc Zyngier
2021-01-20 18:18 ` Catalin Marinas
2021-01-18 9:45 ` [PATCH v4 03/21] arm64: Turn the MMU-on sequence into a macro Marc Zyngier
2021-01-20 18:18 ` Catalin Marinas
2021-01-18 9:45 ` [PATCH v4 04/21] arm64: Provide an 'upgrade to VHE' stub hypercall Marc Zyngier
2021-01-18 11:25 ` David Brazdil
2021-01-24 18:44 ` Marc Zyngier
2021-01-18 9:45 ` [PATCH v4 05/21] arm64: Initialise as nVHE before switching to VHE Marc Zyngier
2021-01-18 9:45 ` [PATCH v4 06/21] arm64: Move VHE-specific SPE setup to mutate_to_vhe() Marc Zyngier
2021-01-18 9:45 ` [PATCH v4 07/21] arm64: Simplify init_el2_state to be non-VHE only Marc Zyngier
2021-01-18 9:45 ` [PATCH v4 08/21] arm64: Move SCTLR_EL1 initialisation to EL-agnostic code Marc Zyngier
2021-01-20 18:35 ` Catalin Marinas
2021-01-18 9:45 ` [PATCH v4 09/21] arm64: cpufeature: Add global feature override facility Marc Zyngier
2021-01-22 18:41 ` Catalin Marinas
2021-01-23 15:59 ` Suzuki K Poulose
2021-01-18 9:45 ` [PATCH v4 10/21] arm64: cpufeature: Use IDreg override in __read_sysreg_by_encoding() Marc Zyngier
2021-01-22 18:53 ` Catalin Marinas
2021-01-23 16:04 ` Suzuki K Poulose
2021-01-18 9:45 ` [PATCH v4 11/21] arm64: Extract early FDT mapping from kaslr_early_init() Marc Zyngier
2021-01-22 18:55 ` Catalin Marinas
2021-01-23 13:25 ` Catalin Marinas
2021-01-18 9:45 ` [PATCH v4 12/21] arm64: cpufeature: Add an early command-line cpufeature override facility Marc Zyngier
2021-01-18 13:07 ` David Brazdil
2021-01-23 13:23 ` Catalin Marinas
2021-01-23 13:43 ` Catalin Marinas
2021-01-24 16:21 ` Marc Zyngier
2021-01-18 9:45 ` [PATCH v4 13/21] arm64: Allow ID_AA64MMFR1_EL1.VH to be overridden from the command line Marc Zyngier
2021-01-23 14:04 ` Catalin Marinas
2021-01-18 9:45 ` [PATCH v4 14/21] arm64: Honor VHE being disabled from the command-line Marc Zyngier
2021-01-18 13:14 ` David Brazdil
2021-01-23 14:07 ` Catalin Marinas
2021-01-24 15:59 ` Marc Zyngier
2021-01-18 9:45 ` [PATCH v4 15/21] arm64: Add an aliasing facility for the idreg override Marc Zyngier
2021-01-18 13:18 ` David Brazdil
2021-01-24 19:01 ` Marc Zyngier
2021-01-23 14:12 ` Catalin Marinas
2021-01-18 9:45 ` [PATCH v4 16/21] arm64: Make kvm-arm.mode={nvhe, protected} an alias of id_aa64mmfr1.vh=0 Marc Zyngier
2021-01-23 14:15 ` [PATCH v4 16/21] arm64: Make kvm-arm.mode={nvhe,protected} " Catalin Marinas
2021-01-18 9:45 ` [PATCH v4 17/21] KVM: arm64: Document HVC_VHE_RESTART stub hypercall Marc Zyngier
2021-01-18 13:29 ` David Brazdil
2021-01-18 9:45 ` [PATCH v4 18/21] arm64: Move "nokaslr" over to the early cpufeature infrastructure Marc Zyngier
2021-01-18 14:46 ` David Brazdil
2021-01-24 18:41 ` Marc Zyngier
2021-01-23 14:19 ` Catalin Marinas
2021-01-18 9:45 ` [PATCH v4 19/21] arm64: cpufeatures: Allow disabling of BTI from the command-line Marc Zyngier
2021-01-23 14:24 ` Catalin Marinas
2021-01-18 9:45 ` [PATCH v4 20/21] arm64: Defer enabling pointer authentication on boot core Marc Zyngier
2021-01-23 14:26 ` Catalin Marinas
2021-01-18 9:45 ` Marc Zyngier [this message]
2021-01-23 14:28 ` [PATCH v4 21/21] arm64: cpufeatures: Allow disabling of Pointer Auth from the command-line Catalin Marinas
2021-01-18 14:54 ` [PATCH v4 00/21] arm64: Early CPU feature override, and applications to VHE, BTI and PAuth David Brazdil
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