From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5CE89C433E0 for ; Tue, 19 Jan 2021 20:41:16 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 055AB23108 for ; Tue, 19 Jan 2021 20:41:15 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 055AB23108 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bootlin.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=S+bWGtBcNrodfVUzKcFPYisn+wZfG+lQSLIrfHulqBc=; b=VwPacMYUTvoZ/Fk++BDYd3dzd wlEjIhW/inyiyTwmjb7hnpqQH3v/21kanHkHL+jhvw4/uiogowSKOtOdXs/lVrNy11RRsJL5Dw2PB LUCvkSDpXkXE/nwlwqeqxhDdrh2Dc13qIYFP/hZRq+FJelSPQENDnn6GxLHQc+Njwy/xJMLZrIvCJ HzklnPpP+AT67VKA8z6J9KRn1okU9HtLNY5rVF3f3DHfAx/8iIxBLS27lcFo0cVLSaqsSRYDE6EM1 EZovmFsQe+2XOWR42Sb6C2cm0GjqfLGSyiZxkPKFO+KJKoiHalcRCz/FJ6BmLNVFlFIdOjtUEB4Cz ImHg7h0cA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l1xmy-00017I-Te; Tue, 19 Jan 2021 20:39:44 +0000 Received: from relay1-d.mail.gandi.net ([217.70.183.193]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1l1xmv-00016W-BP for linux-arm-kernel@lists.infradead.org; Tue, 19 Jan 2021 20:39:42 +0000 X-Originating-IP: 86.202.109.140 Received: from localhost (lfbn-lyo-1-13-140.w86-202.abo.wanadoo.fr [86.202.109.140]) (Authenticated sender: alexandre.belloni@bootlin.com) by relay1-d.mail.gandi.net (Postfix) with ESMTPSA id 12767240002; Tue, 19 Jan 2021 20:39:38 +0000 (UTC) Date: Tue, 19 Jan 2021 21:39:38 +0100 From: Alexandre Belloni To: Steen Hegelund Subject: Re: [PATCH v3 2/3] reset: mchp: sparx5: add switch reset driver Message-ID: <20210119203938.GQ3666@piout.net> References: <20210114162432.3039657-1-steen.hegelund@microchip.com> <20210114162432.3039657-3-steen.hegelund@microchip.com> <20210119203710.GP3666@piout.net> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210119203710.GP3666@piout.net> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210119_153941_494366_D1903664 X-CRM114-Status: GOOD ( 13.12 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Lunn , Gregory Clement , linux-kernel@vger.kernel.org, Microchip Linux Driver Support , Philipp Zabel , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 19/01/2021 21:37:16+0100, Alexandre Belloni wrote: > On 14/01/2021 17:24:31+0100, Steen Hegelund wrote: > > +static int sparx5_switch_reset(struct reset_controller_dev *rcdev, > > + unsigned long id) > > +{ > > + struct mchp_reset_context *ctx = > > + container_of(rcdev, struct mchp_reset_context, rcdev); > > + u32 val; > > + > > I would ensure the reset only happens once here else I'm not sure how > you could do it from the individual drivers. > Ok, the core is taking care of that, nice. -- Alexandre Belloni, Bootlin Embedded Linux and Kernel engineering https://bootlin.com _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel