From: Shawn Guo <shawnguo@kernel.org>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: devicetree@vger.kernel.org, Fabio Estevam <festevam@gmail.com>,
Sascha Hauer <s.hauer@pengutronix.de>,
aford@beaconembedded.com, linux-kernel@vger.kernel.org,
Rob Herring <robh+dt@kernel.org>,
NXP Linux Team <linux-imx@nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Adam Ford <aford173@gmail.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/2] arm64: dts: imx8mn-beacon-som: Enable QSPI on SOM
Date: Fri, 29 Jan 2021 16:56:21 +0800 [thread overview]
Message-ID: <20210129085620.GD907@dragon> (raw)
In-Reply-To: <20210125191957.nrc2saxqebt6tjic@kozik-lap>
On Mon, Jan 25, 2021 at 08:19:57PM +0100, Krzysztof Kozlowski wrote:
> On Tue, Jan 19, 2021 at 07:42:58AM -0600, Adam Ford wrote:
> > There is a QSPI chip connected to the FlexSPI bus. Enable it.
> >
> > Signed-off-by: Adam Ford <aford173@gmail.com>
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi
> > index 2120e6485393..9f575184d899 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi
> > @@ -7,6 +7,7 @@ / {
> > aliases {
> > rtc0 = &rtc;
> > rtc1 = &snvs_rtc;
> > + spi0 = &flexspi;
> > };
> >
> > usdhc1_pwrseq: usdhc1_pwrseq {
> > @@ -89,6 +90,22 @@ ethphy0: ethernet-phy@0 {
> > };
> > };
> >
> > +&flexspi {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_flexspi>;
> > + status = "okay";
> > +
> > + flash@0 {
> > + reg = <0>;
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + compatible = "jedec,spi-nor";
> > + spi-max-frequency = <80000000>;
> > + spi-tx-bus-width = <4>;
> > + spi-rx-bus-width = <4>;
> > + };
> > +};
> > +
> > &i2c1 {
> > clock-frequency = <400000>;
> > pinctrl-names = "default";
> > @@ -318,6 +335,18 @@ MX8MN_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
> > >;
> > };
> >
> > + pinctrl_flexspi: flexspigrp {
> > + fsl,pins = <
> > + MX8MN_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2
> > + MX8MN_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82
> > + MX8MN_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
> > + MX8MN_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
> > + MX8MN_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
> > + MX8MN_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
> > + >;
> > + };
> > +
> > +
>
> Double line break.
Fixed it up, and applied both patches.
Shawn
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prev parent reply other threads:[~2021-01-29 8:57 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-19 13:42 [PATCH 1/2] arm64: dts: imx8mn: Add fspi node Adam Ford
2021-01-19 13:42 ` [PATCH 2/2] arm64: dts: imx8mn-beacon-som: Enable QSPI on SOM Adam Ford
2021-01-25 19:19 ` Krzysztof Kozlowski
2021-01-29 8:56 ` Shawn Guo [this message]
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