From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>,
Jing Zhang <jingzhangos@google.com>,
Prasad Sodagudi <psodagud@codeaurora.org>,
Srinivas Ramana <sramana@codeaurora.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
James Morse <james.morse@arm.com>,
Ajay Patil <pajay@qti.qualcomm.com>,
kernel-team@android.com, David Brazdil <dbrazdil@google.com>,
Will Deacon <will@kernel.org>, Ard Biesheuvel <ardb@kernel.org>,
Julien Thierry <julien.thierry.kdev@gmail.com>
Subject: [PATCH v6 19/21] arm64: cpufeatures: Allow disabling of BTI from the command-line
Date: Mon, 1 Feb 2021 11:56:35 +0000 [thread overview]
Message-ID: <20210201115637.3123740-20-maz@kernel.org> (raw)
In-Reply-To: <20210201115637.3123740-1-maz@kernel.org>
In order to be able to disable BTI at runtime, whether it is
for testing purposes, or to work around HW issues, let's add
support for overriding the ID_AA64PFR1_EL1.BTI field.
This is further mapped on the arm64.nobti command-line alias.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: David Brazdil <dbrazdil@google.com>
Tested-by: Srinivas Ramana <sramana@codeaurora.org>
---
Documentation/admin-guide/kernel-parameters.txt | 3 +++
arch/arm64/include/asm/cpufeature.h | 1 +
arch/arm64/kernel/cpufeature.c | 4 +++-
arch/arm64/kernel/idreg-override.c | 11 +++++++++++
arch/arm64/mm/mmu.c | 2 +-
5 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 2786fd39a047..7599fd0f1ad7 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -373,6 +373,9 @@
arcrimi= [HW,NET] ARCnet - "RIM I" (entirely mem-mapped) cards
Format: <io>,<irq>,<nodeID>
+ arm64.nobti [ARM64] Unconditionally disable Branch Target
+ Identification support
+
ataflop= [HW,M68k]
atarimouse= [HW,MOUSE] Atari Mouse
diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
index 570f1b4ba3cc..30917b9a760b 100644
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -819,6 +819,7 @@ static inline unsigned int get_vmid_bits(u64 mmfr1)
}
extern struct arm64_ftr_override id_aa64mmfr1_override;
+extern struct arm64_ftr_override id_aa64pfr1_override;
u32 get_kvm_ipa_limit(void);
void dump_cpu_features(void);
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index faada5d8bea6..7fbeab497adb 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -558,6 +558,7 @@ static const struct arm64_ftr_bits ftr_raz[] = {
#define ARM64_FTR_REG(id, table) ARM64_FTR_REG_OVERRIDE(id, table, &no_override)
struct arm64_ftr_override __ro_after_init id_aa64mmfr1_override;
+struct arm64_ftr_override __ro_after_init id_aa64pfr1_override;
static const struct __ftr_reg_entry {
u32 sys_id;
@@ -593,7 +594,8 @@ static const struct __ftr_reg_entry {
/* Op1 = 0, CRn = 0, CRm = 4 */
ARM64_FTR_REG(SYS_ID_AA64PFR0_EL1, ftr_id_aa64pfr0),
- ARM64_FTR_REG(SYS_ID_AA64PFR1_EL1, ftr_id_aa64pfr1),
+ ARM64_FTR_REG_OVERRIDE(SYS_ID_AA64PFR1_EL1, ftr_id_aa64pfr1,
+ &id_aa64pfr1_override),
ARM64_FTR_REG(SYS_ID_AA64ZFR0_EL1, ftr_id_aa64zfr0),
/* Op1 = 0, CRn = 0, CRm = 5 */
diff --git a/arch/arm64/kernel/idreg-override.c b/arch/arm64/kernel/idreg-override.c
index 2b492ce73e74..dbe102504630 100644
--- a/arch/arm64/kernel/idreg-override.c
+++ b/arch/arm64/kernel/idreg-override.c
@@ -37,6 +37,15 @@ static const struct ftr_set_desc mmfr1 __initconst = {
},
};
+static const struct ftr_set_desc pfr1 __initconst = {
+ .name = "id_aa64pfr1",
+ .override = &id_aa64pfr1_override,
+ .fields = {
+ { "bt", ID_AA64PFR1_BT_SHIFT },
+ {}
+ },
+};
+
extern struct arm64_ftr_override kaslr_feature_override;
static const struct ftr_set_desc kaslr __initconst = {
@@ -52,6 +61,7 @@ static const struct ftr_set_desc kaslr __initconst = {
static const struct ftr_set_desc * const regs[] __initconst = {
&mmfr1,
+ &pfr1,
&kaslr,
};
@@ -61,6 +71,7 @@ static const struct {
} aliases[] __initconst = {
{ "kvm-arm.mode=nvhe", "id_aa64mmfr1.vh=0" },
{ "kvm-arm.mode=protected", "id_aa64mmfr1.vh=0" },
+ { "arm64.nobti", "id_aa64pfr1.bt=0" },
{ "nokaslr", "kaslr.disabled=1" },
};
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index ae0c3d023824..617e704c980b 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -628,7 +628,7 @@ static bool arm64_early_this_cpu_has_bti(void)
if (!IS_ENABLED(CONFIG_ARM64_BTI_KERNEL))
return false;
- pfr1 = read_sysreg_s(SYS_ID_AA64PFR1_EL1);
+ pfr1 = __read_sysreg_by_encoding(SYS_ID_AA64PFR1_EL1);
return cpuid_feature_extract_unsigned_field(pfr1,
ID_AA64PFR1_BT_SHIFT);
}
--
2.29.2
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next prev parent reply other threads:[~2021-02-01 12:05 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-01 11:56 [PATCH v6 00/21] arm64: Early CPU feature override, and applications to VHE, BTI and PAuth Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 01/21] arm64: Fix labels in el2_setup macros Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 02/21] arm64: Fix outdated TCR setup comment Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 03/21] arm64: Turn the MMU-on sequence into a macro Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 04/21] arm64: Provide an 'upgrade to VHE' stub hypercall Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 05/21] arm64: Initialise as nVHE before switching to VHE Marc Zyngier
2021-02-05 12:01 ` Hector Martin 'marcan'
2021-02-05 14:04 ` Marc Zyngier
2021-02-06 14:29 ` Hector Martin 'marcan'
2021-02-01 11:56 ` [PATCH v6 06/21] arm64: Move VHE-specific SPE setup to mutate_to_vhe() Marc Zyngier
2021-02-03 21:13 ` Will Deacon
2021-02-04 9:30 ` Marc Zyngier
2021-02-04 9:34 ` Will Deacon
2021-02-04 9:50 ` Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 07/21] arm64: Simplify init_el2_state to be non-VHE only Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 08/21] arm64: Move SCTLR_EL1 initialisation to EL-agnostic code Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 09/21] arm64: cpufeature: Add global feature override facility Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 10/21] arm64: cpufeature: Use IDreg override in __read_sysreg_by_encoding() Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 11/21] arm64: Extract early FDT mapping from kaslr_early_init() Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 12/21] arm64: cpufeature: Add an early command-line cpufeature override facility Marc Zyngier
2021-02-05 16:35 ` Will Deacon
2021-02-05 16:42 ` Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 13/21] arm64: Allow ID_AA64MMFR1_EL1.VH to be overridden from the command line Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 14/21] arm64: Honor VHE being disabled from the command-line Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 15/21] arm64: Add an aliasing facility for the idreg override Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 16/21] arm64: Make kvm-arm.mode={nvhe, protected} an alias of id_aa64mmfr1.vh=0 Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 17/21] KVM: arm64: Document HVC_VHE_RESTART stub hypercall Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 18/21] arm64: Move "nokaslr" over to the early cpufeature infrastructure Marc Zyngier
2021-02-01 11:56 ` Marc Zyngier [this message]
2021-02-01 11:56 ` [PATCH v6 20/21] arm64: Defer enabling pointer authentication on boot core Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 21/21] arm64: cpufeatures: Allow disabling of Pointer Auth from the command-line Marc Zyngier
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