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Mon, 01 Feb 2021 04:36:06 -0800 (PST) Date: Mon, 1 Feb 2021 18:06:02 +0530 From: Manivannan Sadhasivam To: linux@armlinux.org.uk, will@kernel.org Subject: Re: [PATCH v2] ARM: kernel: Fix interrupted SMC calls Message-ID: <20210201123602.GD108653@thinkpad> References: <20210118181040.51238-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210118181040.51238-1-manivannan.sadhasivam@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210201_073610_396411_8948E9E5 X-CRM114-Status: GOOD ( 22.05 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, bjorn.andersson@linaro.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, On Mon, Jan 18, 2021 at 11:40:40PM +0530, Manivannan Sadhasivam wrote: > On Qualcomm ARM32 platforms, the SMC call can return before it has > completed. If this occurs, the call can be restarted, but it requires > using the returned session ID value from the interrupted SMC call. > > The ARM32 SMCC code already has the provision to add platform specific > quirks for things like this. So let's make use of it and add the > Qualcomm specific quirk (ARM_SMCCC_QUIRK_QCOM_A6) used by the QCOM_SCM > driver. > > This change is similar to the below one added for ARM64 a while ago: > commit 82bcd087029f ("firmware: qcom: scm: Fix interrupted SCM calls") > > Without this change, the Qualcomm ARM32 platforms like SDX55 will return > -EINVAL for SMC calls used for modem firmware loading and validation. > > Signed-off-by: Manivannan Sadhasivam A gentle ping on this patch! Thanks, Mani > --- > > Changes in v2: > > * Preserved callee saved registers and used the registers r4, r5 which > are getting pushed onto the stack. > > arch/arm/kernel/asm-offsets.c | 3 +++ > arch/arm/kernel/smccc-call.S | 11 ++++++++++- > 2 files changed, 13 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c > index a1570c8bab25..2e2fa6fc2d4f 100644 > --- a/arch/arm/kernel/asm-offsets.c > +++ b/arch/arm/kernel/asm-offsets.c > @@ -23,6 +23,7 @@ > #include > #include > #include > +#include > #include "signal.h" > > /* > @@ -147,6 +148,8 @@ int main(void) > DEFINE(SLEEP_SAVE_SP_PHYS, offsetof(struct sleep_save_sp, save_ptr_stash_phys)); > DEFINE(SLEEP_SAVE_SP_VIRT, offsetof(struct sleep_save_sp, save_ptr_stash)); > #endif > + DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id)); > + DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state)); > BLANK(); > DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL); > DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE); > diff --git a/arch/arm/kernel/smccc-call.S b/arch/arm/kernel/smccc-call.S > index 00664c78faca..931df62a7831 100644 > --- a/arch/arm/kernel/smccc-call.S > +++ b/arch/arm/kernel/smccc-call.S > @@ -3,7 +3,9 @@ > * Copyright (c) 2015, Linaro Limited > */ > #include > +#include > > +#include > #include > #include > #include > @@ -27,7 +29,14 @@ UNWIND( .fnstart) > UNWIND( .save {r4-r7}) > ldm r12, {r4-r7} > \instr > - pop {r4-r7} > + ldr r4, [sp, #36] > + cmp r4, #0 > + beq 1f // No quirk structure > + ldr r5, [r4, #ARM_SMCCC_QUIRK_ID_OFFS] > + cmp r5, #ARM_SMCCC_QUIRK_QCOM_A6 > + bne 1f // No quirk present > + str r6, [r4, #ARM_SMCCC_QUIRK_STATE_OFFS] > +1: pop {r4-r7} > ldr r12, [sp, #(4 * 4)] > stm r12, {r0-r3} > bx lr > -- > 2.25.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel