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Wed, 03 Feb 2021 20:09:16 -0800 (PST) Date: Thu, 4 Feb 2021 12:09:09 +0800 From: Leo Yan To: Mike Leach Subject: Re: [PATCH v2 7/7] Documentation: coresight: Add PID tracing description Message-ID: <20210204040909.GH11059@leoy-ThinkPad-X240s> References: <20210202163842.134734-1-leo.yan@linaro.org> <20210202163842.134734-8-leo.yan@linaro.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210203_230919_280979_54827B91 X-CRM114-Status: GOOD ( 28.02 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Denis Nikitin , Mathieu Poirier , Jonathan Corbet , Alexander Shishkin , Jiri Olsa , Coresight ML , John Garry , "open list:DOCUMENTATION" , Linux Kernel Mailing List , Arnaldo Carvalho de Melo , Peter Zijlstra , Ingo Molnar , linux-arm-kernel , Namhyung Kim , Will Deacon , Suzuki K Poulose , Daniel Kiss Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Mike, On Wed, Feb 03, 2021 at 05:39:54PM +0000, Mike Leach wrote: [...] > > +2.2) Tracing PID > > + > > +When the kernel is running at EL2 with Virtualization Host Extensions (VHE), > > +perf records CONTEXTIDR_EL2 in the trace data and can be used as PID when > > +decoding; and if the kernel is running at EL1 with nVHE, CONTEXTIDR_EL1 is > > +traced for PID. > > + > > Would this introductory paragraph be better if is explained where the > kernel stores the PID for the different levels, then we logically move > on to how to trace this in perf. > > e.g:- > > "The lernel can be built to write the PID value into the PE ContextID registers. > For a kernel running at EL1, the PID is stored in CONTEXTIDR_EL1. > A PE may implement ARM Virtualisation Host Extensions (VHE), were the > kernel can run at EL2 as a virtualisation host. > In this case the PID value is stored in CONTEXTIDR_EL2. > perf provides PMU options which program the ETM to insert these values > into the trace data." Will in next spin; thanks a lot for writing up! > > +To support tracing PID for the kernel runs at different exception levels, > > +the PMU formats are defined as follow: > > + > > + "contextid1": Available on both EL1 kernel and EL2 kernel. When the > > + kernel is running at EL1, "contextid1" enables the PID > > + tracing; when the kernel is running at EL2, this enables > > + tracing the PID of guest applications. > > + > > + "contextid2": Only usable when the kernel is running at EL2. When > > + selected, enables PID tracing on EL2 kernel. > > + > > + "contextid": Will be an alias for the option that enables PID > > + tracing. I.e, > > + contextid == contextid1, on EL1 kernel. > > + contextid == contextid2, on EL2 kernel. > > + > > +The perf tool automatically sets corresponding bit for the "contextid" config, > > +therefore, the user doesn't have to bother which EL the kernel is running. > > + > > + i.e, perf record -e cs_etm/contextid/u -- uname > > + or perf record -e cs_etm//u -- uname > > + > > +will always do the "PID" tracing, independent of the kernel EL. > > + > > This is telling me that both cs_etm// and cs_etm/contextid/ have the > same effect - trace PID. Is this correct? Correct. > If so, then contextid, contextid1 and contextid2 have no effect except > in specific EL2 circumstances. Yes, exactly. Thanks, Leo > > +When the kernel is running at EL2 with VHE, if user wants to trace both the > > +PIDs for both host and guest, the two configs "contextid1" and "contextid2" > > +can be set at the same time: > > + > > + perf record -e cs_etm/contextid1,contextid2/u -- uname > > + > > > > > Regards > > Mike > > > > Generating coverage files for Feedback Directed Optimization: AutoFDO > > --------------------------------------------------------------------- > > -- > > 2.25.1 > > > > > -- > Mike Leach > Principal Engineer, ARM Ltd. > Manchester Design Centre. UK _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel