From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 00B3BC433DB for ; Fri, 19 Feb 2021 16:16:30 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B485464EC0 for ; Fri, 19 Feb 2021 16:16:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B485464EC0 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=AlmTF4MuMerj7RbB2Lz4pmZXF2hAxZLilTB4jqg4MOw=; b=2AGCz9yx2f9BggkS+St0U5QUk +vg0kMrT195sLQjZ8/opS1EbA5K4Q4ZTfE2TaGE9ju8w9sofMoFOk4IcZ1QvP0V+MmDWqA8Ps5reX Yr84+ehDBagab2XGy5AxKQIdK5PUpwEEG9R1GUfUvTgyqawHQEp97CqT4tjowd+0hlF6CSLpTBiCg iP/hvdH92ETEW6ZdmBAi2ZSiKPA70X2qC8FEx8TNKaSK3hYhbO1SqQwXGeZatDjAHgRWQhVZaPXrq al+Zh36xDcsmayusjZl3ZPa/DiJmozNHahrigGEM/p1FfykozixbtGpx+VfaRTyKZ3195/uCeiGju TJLj6f3Qw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1lD8PF-0003vu-9W; Fri, 19 Feb 2021 16:13:25 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1lD8PC-0003up-TB for linux-arm-kernel@lists.infradead.org; Fri, 19 Feb 2021 16:13:24 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 82305ED1; Fri, 19 Feb 2021 08:13:20 -0800 (PST) Received: from C02TD0UTHF1T.local (unknown [10.57.45.200]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 718DE3F73B; Fri, 19 Feb 2021 08:13:18 -0800 (PST) Date: Fri, 19 Feb 2021 16:13:15 +0000 From: Mark Rutland To: Hector Martin Subject: Re: [PATCH 0/8] arm64: Support FIQ controller registration Message-ID: <20210219161315.GB78721@C02TD0UTHF1T.local> References: <20210219113904.41736-1-mark.rutland@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210219_111323_077776_D3589F08 X-CRM114-Status: GOOD ( 31.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Arnd Bergmann , catalin.marinas@arm.com, linux-kernel@vger.kernel.org, james.morse@arm.com, maz@kernel.org, tglx@linutronix.de, will@kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sat, Feb 20, 2021 at 12:41:01AM +0900, Hector Martin wrote: > Hi Mark, > > Thanks for tackling this side of the problem! No problem -- I have a vested interest in the arm64 exception management code lookin the way I expect/prefer! ;) > On 19/02/2021 20.38, Mark Rutland wrote: > > I'm hoping that we can somehow queue the first 6 patches of this series as a > > base for the M1 support. With that we can either cherry-pick a later version of > > the DAIF.IF patch here, or the M1 support series can take the FIQ handling > > patch. I've pushed the series out to my arm64/fiq branch [4] on kernel.org, > > atop v5.11. > > Looks good! I cherry picked my updated version of the DAIF.IF patch into > your series at [1] (3322522d), and then rebased the M1 series on top of it > (with the change to use set_handle_fiq(), minus all the other obsoleted FIQ > stuff) at [2]. It all boots and works as expected. > > I think it makes sense for you to take the DAIF.IF patch, as it goes along > with this series. Then we can base the M1 series off of it. Sure; that works for me! > If you think that works, I can send it off as a one-off reply to the > version in this series and we can review it here if you want, or > otherwise feel free to cherry-pick it into a v2 (CC as appropriate). If you could do a one-off reply, that'd be fantastic -- that way lore.kernel.org will archive it and it gives people a chance to provide any tags or comments before the next respin of the whole series. > If this all makes sense, the v3 of the M1 series will then be based off of > this patchset as in [2], and I'll link to your tree in the cover letter so > others know where to apply it. As a heads-up, I'm currently treating my arm64/fiq branch as unstable (and I've already applied a typo fix since this posting), but I can tag versions of that to make it possible to refer to a specific version. I'll make sure to do that once I fold in the new DAIF.[IF] patch, since I assume that's the first version worth noting as a base. > Arnd (CCed) is going to be merging that one via the SoC tree, so as > long as we coordinate a stable base once everything is reviewed and > ready to merge, I believe it should all work out fine on the way up. That sounds about right to me. I think the first step is for Marc and I to figure out how the core IRQ bits go in (some of that might be an fix early in the current v5.12 cycle), and I'd expect to have a stable branch atop somewhere between v5.12-rc1 and v5.12-rc4. For context, usually the arm64 core bits get based on the previous rc3/rc4. Thanks, Mark. > Just for completeness, the current DAIF.IF patch in the context of the > original series is at [3] (4dd6330f), in case that's useful to someone for > some reason (since there were conflicts due to the refactoring happening > before it, it changed a bit). > > [1] https://github.com/AsahiLinux/linux/tree/fiq > [2] https://github.com/AsahiLinux/linux/tree/upstream-bringup-v3 > [3] https://github.com/AsahiLinux/linux/tree/upstream-bringup-v2.5 > > -- > Hector Martin (marcan@marcan.st) > Public Key: https://mrcn.st/pub _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel