From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DFB1CC433E0 for ; Wed, 24 Feb 2021 11:08:20 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7DB4D64E6B for ; Wed, 24 Feb 2021 11:08:20 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7DB4D64E6B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=caitmeWG0phwVis8stTM4o0Ybd0Qmmyzw976bzymgGc=; b=EvHE6IB1EFYk6pSjSC46APqAY sd8vhtAoYk02Juwo1S2w5aJlvBOHpm0XAxtiX99ad/T1OqC+5AqzefjcxuUWYZMV+3w0nF7VZachX CeQigYkMStky3YVywALEV9DVPPKfxM7HmNS+UdSDizbGIITxrtF4gZo9FRxmI7F17HxaHj6rZJ0Zr PQUSB7Xf5PmpDxqc+FxCXV2MFNhPF1j/HQnAC5z3WRu0KyBCoZshbKptZ5Ly56qVueSlXJZnIGVB4 qdO5/JBn/Z3VTlQy6YFLkUdo9BL1vl1uPPKeuTfPVoB7YjwCKE0QemeZRf31hpNYTVyEduArU4bgx uY7D5EY6Q==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1lEs0Y-0003HT-UF; Wed, 24 Feb 2021 11:07:07 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1lEs0W-0003Gz-RT for linux-arm-kernel@lists.infradead.org; Wed, 24 Feb 2021 11:07:05 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 237161FB; Wed, 24 Feb 2021 03:06:52 -0800 (PST) Received: from C02TD0UTHF1T.local (unknown [10.57.52.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5C1253F73B; Wed, 24 Feb 2021 03:06:50 -0800 (PST) Date: Wed, 24 Feb 2021 11:06:43 +0000 From: Mark Rutland To: Marc Zyngier Subject: Re: [PATCH 2/3] arm64: Add missing ISB after invalidating TLB in __primary_switch Message-ID: <20210224110506.GA50741@C02TD0UTHF1T.local> References: <20210224093738.3629662-1-maz@kernel.org> <20210224093738.3629662-3-maz@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210224093738.3629662-3-maz@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210224_060704_955714_029BF7E5 X-CRM114-Status: GOOD ( 20.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Will Deacon , Guillaume Tucker , Catalin Marinas , kernel-team@android.com, Ard Biesheuvel , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Marc, On Wed, Feb 24, 2021 at 09:37:37AM +0000, Marc Zyngier wrote: > Although there has been a bit of back and forth on the subject, > it appears that invalidating TLBs requires an ISB instruction > after the TLBI/DSB sequence, as documented in d0b7a302d58a > ("Revert "arm64: Remove unnecessary ISBs from set_{pte,pmd,pud}""). That commit describes a different scenario (going faulting->valid without TLB maintenance), and I don't think that implies anything about the behaviour in the presence of a TLBI, which is quite different. Howerver, I do see that commits: 7f0b1bf045113489 ("arm64: Fix barriers used for page table modifications") 51696d346c49c6cf ("arm64: tlb: Ensure we execute an ISB following walk cache invalidation") ... assume that we need an ISB after a TLBI+DSB, so I think it would be better to refer to those, to avoid conflating the distinct cases. > Add the missing ISB in __primary_switch, just in case. > > Fixes: 3c5e9f238bc4 ("arm64: head.S: move KASLR processing out of __enable_mmu()") > Suggested-by: Will Deacon > Signed-off-by: Marc Zyngier For consistency with the other kernel TLBI paths, I'm fine with this (assuming we update the commit message accordingly): Acked-by: Mark Rutland My understanding is that we don't need an ISB after invalidation, and if we align on that understanding we can follow up and update all of the TLBI paths in one go. Thanks, Mark. > --- > arch/arm64/kernel/head.S | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S > index 1e30b5550d2a..66b0e0b66e31 100644 > --- a/arch/arm64/kernel/head.S > +++ b/arch/arm64/kernel/head.S > @@ -837,6 +837,7 @@ SYM_FUNC_START_LOCAL(__primary_switch) > > tlbi vmalle1 // Remove any stale TLB entries > dsb nsh > + isb _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel