From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9B72C433DB for ; Thu, 25 Feb 2021 09:32:05 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4BCCF64EC3 for ; Thu, 25 Feb 2021 09:32:05 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4BCCF64EC3 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=xuDZvntfwz3pQRg35+XMdz9f55shCQ2x1ha6bd6GG9U=; b=OuHYIH0fLQc7HSoodWoizAb+c jGoVtI6MZFxjUHsKxiHjVPL1XvDqzXEOpi/AjHAdtZJs3W0Hw9wy67LwEqeWMR+yJA1EqWyDMGgHG NxH/5mA8Vt+Mye0hNA7E5rxWel78vItNQ2WyTa9pKN5wmGEPYgt32D6SzoLqQJmzxzgEgG35cSCvx oIQme1/SHeQnsb0pToK5PvDgZG/892PJStBQbZVDXZU7FhLJ2Yi9tBhQyTIkCpjdkzvDq1o9sfViA vBWerqWastFLoYA7Lqtqo818c3AX+g22sQiy2cc134xFiltpOGo2PK3xDKoh1LKA1uNNpNPYV5r7/ ldDbymQog==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1lFCyP-0006Bz-84; Thu, 25 Feb 2021 09:30:17 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1lFCyN-0006Be-K4 for linux-arm-kernel@lists.infradead.org; Thu, 25 Feb 2021 09:30:16 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5FEF6ED1; Thu, 25 Feb 2021 01:30:07 -0800 (PST) Received: from e121166-lin.cambridge.arm.com (e121166-lin.cambridge.arm.com [10.1.196.255]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E1BB03F73D; Thu, 25 Feb 2021 01:30:05 -0800 (PST) Date: Thu, 25 Feb 2021 09:30:00 +0000 From: Lorenzo Pieralisi To: Jon Masters Subject: Re: [PATCH] arm64: PCI: Enable SMC conduit Message-ID: <20210225093000.GA22843@e121166-lin.cambridge.arm.com> References: <4c2db08d-ccc4-05eb-6b7b-5fd7d07dd11e@arm.com> <20210128233147.GA28434@bjorn-Precision-5520> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210225_043015_799918_D6CACF9F X-CRM114-Status: GOOD ( 32.66 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, Catalin Marinas , linux-pci@vger.kernel.org, lkml , Jeremy Linton , Bjorn Helgaas , sudeep.holla@arm.com, Bjorn Helgaas , Will Deacon , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Feb 18, 2021 at 12:43:30PM -0500, Jon Masters wrote: > Hi Bjorn, all, > > On Thu, Jan 28, 2021 at 6:31 PM Bjorn Helgaas wrote: > > On Tue, Jan 26, 2021 at 10:46:04AM -0600, Jeremy Linton wrote: > > > > > Does that mean its open season for ECAM quirks, and we can expect > > them to start being merged now? > > "Open season" makes me cringe because it suggests we have a license to > use quirks indiscriminately forever, and I hope that's not the case. > > Lorenzo is closer to this issue than I am and has much better insight > into the mess this could turn into. From my point of view, it's > shocking how much of a hassle this is compared to x86. There just > aren't ECAM quirks, in-kernel clock management, or any of that crap. > I don't know how they do it on x86 and I don't have to care. Whatever > they need to do, they apparently do in AML. Eventually ARM64 has to > get there as well if vendors want distro support. > > I don't want to be in the position of enforcing a draconian "no more > quirks ever" policy. The intent -- to encourage/force vendors to > develop spec-compliant machines -- is good, but it seems like the > reward of having compliant machines "just work" vs the penalty of > having to write quirks and shepherd them upstream and into distros > will probably be more effective and not much slower. > > > The problem is that the third party IP vendors (still) make too much junk. For > years, there wasn't a compliance program (e.g. SystemReady with some of the > meat behind PCI-SIG compliance) and even when there was the third party IP > vendors building "root ports" (not even RCs) would make some junk with a hacked > up Linux kernel booting on a model and demo that as "PCI". There wasn't the > kind of adult supervision that was required. It is (slowly) happening now, but > it's years and years late. It's just embarrassing to see the lack of ECAM that > works. In many cases, it's because the IP being used was baked years ago or > made for some "non server" (as if there is such a thing) use case, etc. But in > others, there was a chance to do it right, and it still happens. Some of us > have lost what hair we had over the years getting third party IP vendors to > wake up and start caring about this. > > So there's no excuse. None at all. However, this is where we are. And it /is/ > improving. But it's still too slow, and we have platforms still coming to > market that need to boot and run. Based on this, and the need to have something > more flexible than just solving for ECAM deficiencies (which are really just a > symptom), I can see the allure of an SMC. I don't like it, but if that's where > folks want to go, and if we can find a way to constrain the enthusiasm for it, > then perhaps it is a path forward. But if we are to go down that path it needs > to come with a giant warning from the kernel that a system was booted at is > relying on that. Something that will cause an OS certification program to fail > without a waiver, or will cause customers to phone up for support wondering why > the hw is broken. It *must* not be a silent thing. It needs to be "this > hardware is broken and non-standard, get the next version fixed". It is a stance I agree with in many respects, it should be shared (it was in HTML format - the lists unfortunately dropped the message) so I am replying to it to make it public. Thanks, Lorenzo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel