From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80AB4C433DB for ; Thu, 25 Feb 2021 18:32:06 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 095F164E6C for ; Thu, 25 Feb 2021 18:32:05 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 095F164E6C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=gtAXBidVm+w+DGkSS7wsUtprq2Ly2mJUSZD10Cuyjrs=; b=cg3De94chJbyGc2FeFoEXQ5pS V5SwyecwU3OeEQ8UUQDCquvsFSf06j4OY1Gnedpd8iyVsDnYPcM15Ku0pxN577L2GkK/GToOBF/KQ ui1BVEFci+Ep6EO0cNhbFkSNPJCeiRbonzGPA+d1fRib+H7XXzyV8U6+LPn9XGoqXdA6vSznBssEl ZFK517NOJBAAimnTzvODPZD27RDK7mTRbWcklnd+6sdFXu8nNZiq1SCrSNEpbiOX8IW/g+zDjNeqe wMjpsiGiy6vnh+G6GTsYXJRCqIgLK9hJe2sEjGdfo9G+yFPuVkXndk7eWmItpG5eLx8inqkKs3zrW Gp5hFkjIA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1lFLPf-0001PU-VJ; Thu, 25 Feb 2021 18:31:00 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1lFLPd-0001P1-BM for linux-arm-kernel@lists.infradead.org; Thu, 25 Feb 2021 18:30:58 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 09DD61063; Thu, 25 Feb 2021 10:30:53 -0800 (PST) Received: from C02TD0UTHF1T.local (unknown [10.57.50.41]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A93E83F73D; Thu, 25 Feb 2021 10:30:51 -0800 (PST) Date: Thu, 25 Feb 2021 18:30:45 +0000 From: Mark Rutland To: Anshuman Khandual Subject: Re: [boot-wrapper] [PATCH] aarch64: Enable TRBE for the non-secure world Message-ID: <20210225183045.GA41738@C02TD0UTHF1T.local> References: <1613042797-13109-1-git-send-email-anshuman.khandual@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1613042797-13109-1-git-send-email-anshuman.khandual@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210225_133057_466111_78E80AAE X-CRM114-Status: GOOD ( 16.52 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andre.Przywara@arm.com, james.morse@arm.com, linux-arm-kernel@lists.infradead.org, Suzuki.Poulose@arm.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Feb 11, 2021 at 04:56:37PM +0530, Anshuman Khandual wrote: > MDCR_EL3.NSTB resets to an UNKNOWN value. Configure it to allow the trace > buffer to use non-secure memory and to permit direct register accesses from > the non-secure world. Before that, just check AA64DFR0_EL1.TraceBuffer and > make sure TRBE is implemented. We still continue to reset MDCR_EL3 register > to zero with the exception of MDCR_EL3.NSPB and MDCR_EL3.NSTB. > > Signed-off-by: Anshuman Khandual Applied, thanks! Mark. > --- > arch/aarch64/boot.S | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S > index 37f4b98..e47cf59 100644 > --- a/arch/aarch64/boot.S > +++ b/arch/aarch64/boot.S > @@ -71,6 +71,14 @@ _start: > ldr x1, =(0x3 << 12) > orr x0, x0, x1 > > +1: mrs x1, id_aa64dfr0_el1 > + ubfx x1, x1, #44, #4 > + cbz x1, 1f > + > + // Enable TRBE for the non-secure world. > + ldr x1, =(0x3 << 24) > + orr x0, x0, x1 > + > 1: msr mdcr_el3, x0 // Disable traps to EL3 > > mrs x0, id_aa64pfr0_el1 > -- > 2.7.4 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel