From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B7321C433DB for ; Sat, 27 Feb 2021 16:12:57 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6CDE864E4D for ; Sat, 27 Feb 2021 16:12:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6CDE864E4D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=vQYPZ/guKaPAJrXa9IVnzOsqpte4ZIlChvkUUrjtjek=; b=D2XQpLkClZJkKVDwf9RGMvrtN 5oCKBhd6+c7CHnU1IUXwIHrjJ2YsFa/FRp3/uPfgj7f74132AZT+kzTFbQm/mw1vNeoHeZvzY5By6 wGXxpX5/JGJRdxKIIb6MHEx1kgBftXdTfUcioc31Rj1QCeJ4UJMZ9WVzMnSr9P2j/+j/ZVf5JC94E DqDpRwq2IJeHVyqjiI3iXRpOvYaOh156BwYoy1PrPC1j5xWog9KcaI5V08ul3sHIVNkun5h9x6zTB yv/ab5KypnR2dwDVijx23kKPPkhFyDEMM+g9f2Rj+7gcheJId27rC0YtN3VlW5H13RYwpaE5eWF9G VliupAAoA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1lG2Bi-0004Oz-EH; Sat, 27 Feb 2021 16:11:26 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1lG2Bg-0004OX-9v for linux-arm-kernel@lists.infradead.org; Sat, 27 Feb 2021 16:11:25 +0000 Received: from archlinux (cpc108967-cmbg20-2-0-cust86.5-4.cable.virginm.net [81.101.6.87]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id AE30A64E4D; Sat, 27 Feb 2021 16:11:21 +0000 (UTC) Date: Sat, 27 Feb 2021 16:11:15 +0000 From: Jonathan Cameron To: Fabrice Gasnier Subject: Re: [PATCH v2] counter: stm32-timer-cnt: Report count function when SLAVE_MODE_DISABLED Message-ID: <20210227161115.28fdda76@archlinux> In-Reply-To: References: <20210226012931.161429-1-vilhelm.gray@gmail.com> X-Mailer: Claws Mail 3.17.8 (GTK+ 2.24.33; x86_64-pc-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210227_111124_471312_31411026 X-CRM114-Status: GOOD ( 26.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alexandre.torgue@st.com, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray , mcoquelin.stm32@gmail.com, fabrice.gasnier@st.com, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, benjamin.gaignard@st.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, 26 Feb 2021 16:24:32 +0100 Fabrice Gasnier wrote: > On 2/26/21 2:29 AM, William Breathitt Gray wrote: > > When in SLAVE_MODE_DISABLED mode, the count still increases if the > > counter is enabled because an internal clock is used. This patch fixes > > the stm32_count_function_get() and stm32_count_function_set() functions > > to properly handle this behavior. > > > > Fixes: ad29937e206f ("counter: Add STM32 Timer quadrature encoder") > > Cc: Fabrice Gasnier > > Cc: Maxime Coquelin > > Cc: Alexandre Torgue > > Signed-off-by: William Breathitt Gray > > --- > > Changes in v2: > > - Support an explicit 0 case for function_get()/function_set() > > > > drivers/counter/stm32-timer-cnt.c | 39 ++++++++++++++++++++----------- > > 1 file changed, 25 insertions(+), 14 deletions(-) > > Hi William, > > Reviewed-by: Fabrice Gasnier Applied to the fixes-togreg branch of iio.git Thanks, Jonathan > > Many thanks for this fix. > Best Regards, > Fabrice > > > > > > diff --git a/drivers/counter/stm32-timer-cnt.c b/drivers/counter/stm32-timer-cnt.c > > index ef2a974a2f10..cd50dc12bd02 100644 > > --- a/drivers/counter/stm32-timer-cnt.c > > +++ b/drivers/counter/stm32-timer-cnt.c > > @@ -44,13 +44,14 @@ struct stm32_timer_cnt { > > * @STM32_COUNT_ENCODER_MODE_3: counts on both TI1FP1 and TI2FP2 edges > > */ > > enum stm32_count_function { > > - STM32_COUNT_SLAVE_MODE_DISABLED = -1, > > + STM32_COUNT_SLAVE_MODE_DISABLED, > > STM32_COUNT_ENCODER_MODE_1, > > STM32_COUNT_ENCODER_MODE_2, > > STM32_COUNT_ENCODER_MODE_3, > > }; > > > > static enum counter_count_function stm32_count_functions[] = { > > + [STM32_COUNT_SLAVE_MODE_DISABLED] = COUNTER_COUNT_FUNCTION_INCREASE, > > [STM32_COUNT_ENCODER_MODE_1] = COUNTER_COUNT_FUNCTION_QUADRATURE_X2_A, > > [STM32_COUNT_ENCODER_MODE_2] = COUNTER_COUNT_FUNCTION_QUADRATURE_X2_B, > > [STM32_COUNT_ENCODER_MODE_3] = COUNTER_COUNT_FUNCTION_QUADRATURE_X4, > > @@ -90,6 +91,9 @@ static int stm32_count_function_get(struct counter_device *counter, > > regmap_read(priv->regmap, TIM_SMCR, &smcr); > > > > switch (smcr & TIM_SMCR_SMS) { > > + case 0: > > + *function = STM32_COUNT_SLAVE_MODE_DISABLED; > > + return 0; > > case 1: > > *function = STM32_COUNT_ENCODER_MODE_1; > > return 0; > > @@ -99,9 +103,9 @@ static int stm32_count_function_get(struct counter_device *counter, > > case 3: > > *function = STM32_COUNT_ENCODER_MODE_3; > > return 0; > > + default: > > + return -EINVAL; > > } > > - > > - return -EINVAL; > > } > > > > static int stm32_count_function_set(struct counter_device *counter, > > @@ -112,6 +116,9 @@ static int stm32_count_function_set(struct counter_device *counter, > > u32 cr1, sms; > > > > switch (function) { > > + case STM32_COUNT_SLAVE_MODE_DISABLED: > > + sms = 0; > > + break; > > case STM32_COUNT_ENCODER_MODE_1: > > sms = 1; > > break; > > @@ -122,8 +129,7 @@ static int stm32_count_function_set(struct counter_device *counter, > > sms = 3; > > break; > > default: > > - sms = 0; > > - break; > > + return -EINVAL; > > } > > > > /* Store enable status */ > > @@ -274,31 +280,36 @@ static int stm32_action_get(struct counter_device *counter, > > size_t function; > > int err; > > > > - /* Default action mode (e.g. STM32_COUNT_SLAVE_MODE_DISABLED) */ > > - *action = STM32_SYNAPSE_ACTION_NONE; > > - > > err = stm32_count_function_get(counter, count, &function); > > if (err) > > - return 0; > > + return err; > > > > switch (function) { > > + case STM32_COUNT_SLAVE_MODE_DISABLED: > > + /* counts on internal clock when CEN=1 */ > > + *action = STM32_SYNAPSE_ACTION_NONE; > > + return 0; > > case STM32_COUNT_ENCODER_MODE_1: > > /* counts up/down on TI1FP1 edge depending on TI2FP2 level */ > > if (synapse->signal->id == count->synapses[0].signal->id) > > *action = STM32_SYNAPSE_ACTION_BOTH_EDGES; > > - break; > > + else > > + *action = STM32_SYNAPSE_ACTION_NONE; > > + return 0; > > case STM32_COUNT_ENCODER_MODE_2: > > /* counts up/down on TI2FP2 edge depending on TI1FP1 level */ > > if (synapse->signal->id == count->synapses[1].signal->id) > > *action = STM32_SYNAPSE_ACTION_BOTH_EDGES; > > - break; > > + else > > + *action = STM32_SYNAPSE_ACTION_NONE; > > + return 0; > > case STM32_COUNT_ENCODER_MODE_3: > > /* counts up/down on both TI1FP1 and TI2FP2 edges */ > > *action = STM32_SYNAPSE_ACTION_BOTH_EDGES; > > - break; > > + return 0; > > + default: > > + return -EINVAL; > > } > > - > > - return 0; > > } > > > > static const struct counter_ops stm32_timer_cnt_ops = { > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel