From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE5B3C433E6 for ; Thu, 4 Mar 2021 01:48:06 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1644C64FA5 for ; Thu, 4 Mar 2021 01:48:06 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1644C64FA5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=C1rLSdD44qQCiFZC6LxgERMFBxDj+gpX3+weli5Ruls=; b=cLNLMWoZxLIqbHQ474T2DiMz2 HsSWnnRtr8lFo74RiYPNEPWwFqzaxCpxgXHrAyqFCCvxCl+/6Gc/ss9mMVum7P9t0h1g0Jd/qPxBn xQYDLNFbHhoRJR8ccyJgyF9OMXlqeLzxnIAqLIUuG4iYqm4tBAHgv6yjbeXlEe3CAjdqr17dIrqIl ZeX9ed+oi/hGbhGf8+nrkuOPq57tSxIyl6GaQfKBkd3jiRFABcv9IrRSeLYViim/megqpujnePfee C9bo1X4kD7QHwyifcHJAvVQITycWq1GccNlToIcMOCsg4Qq6geWPADbNIivQnB0a4uV9uCOOamzxf JefwixzZw==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lHd38-007NNE-8t; Thu, 04 Mar 2021 01:45:14 +0000 Received: from mail.kernel.org ([198.145.29.99]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lHZCT-006cRh-Gj for linux-arm-kernel@lists.infradead.org; Wed, 03 Mar 2021 21:39:13 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id 7881564EF6; Wed, 3 Mar 2021 21:38:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1614807501; bh=tXIp6KPoSG3xACYSMqxr3owe0stxz5QEDddIDkr+xuE=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=Dbclovqz1RXM0Lt0KTflZJKChkqHM1k+xZcdrNLhXiYBu5rLc1T7j67dL1H7xDoqZ 9B8KH8y0A7kxIjPR9e+sPWWu0yYz9qhMC+bf+JYEGC3Dxs5zgGF2ijCaVWSqqV036q 3dqb6ld7tohNMo7K8i16VhbWOhPCrY+WzJjjE1IimGJ6GLvXBSLbbtJULz6a0sFUyt WSO+9rWfMgX3Vzf58+18lT13BlHFOdym038BYUaqONeonfex+ewgShEtaU0LLP4p1e TH2E10wC4jpSgnSNSsqLTk/ghe61dp8e6Rj+bV+puoUBkX3frgNWurIC8ePczSou/g /HxPosP7kliCw== Date: Wed, 3 Mar 2021 21:38:16 +0000 From: Will Deacon To: Hector Martin Cc: Linux ARM , Marc Zyngier , Mark Rutland , Peter Zijlstra , Boqun Feng , Catalin Marinas Subject: Re: LSE atomic op ordering is weaker than intended? Message-ID: <20210303213815.GC20055@willie-the-truck> References: <90ea3e27-b2ef-41ac-75c7-5f0686603b2a@marcan.st> <20210303153619.GA19247@willie-the-truck> <20210303184055.GA19891@willie-the-truck> <0d194019-deb9-8d9b-823c-4226f2d2dce2@marcan.st> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <0d194019-deb9-8d9b-823c-4226f2d2dce2@marcan.st> User-Agent: Mutt/1.10.1 (2018-07-13) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Mar 04, 2021 at 04:37:31AM +0900, Hector Martin wrote: > On 04/03/2021 03.40, Will Deacon wrote: > > > // ...stuff that needs to be ordered prior to the atomic here > > > ret = atomic_fetch_or_release(flags...) > > > if (condition on ret and unrelated stuff) { > > > writel(reg_send, ...) // includes pre-barrier > > > > Looks you have a control dependency here, so I think that can be > > writel_relaxed() [with a comment!]. > > Wouldn't the control dependency be strictly on the *read* portion of the > atomic, while I'm looking to order on the write part? Ah, sorry, I didn't realise you were ordering against the write. I'll wait for the v3, but just one thing that might help: > That is, that I can create two ordered sequences on two PEs: > > (normal access 1; mmio write 1) > (mmio write 2; normal access 2) > > Such that I can assert that at least one of the following orderings are > true: > > (normal access 1; normal access 2) > (as observed by the PEs) > > or: > > (mmio write 2; mmio write 1) > (as observed by the MMIO device) One thing to bear in mind here is that the MMIO device cannot "observe" anything in the architectural sense because it is a slave interface. In order to observe a memory access, you must emit a read or a write transaction, and it's this notion of observation which the shareability domains are built around. So for this example, we can talk about the CPUs (in the inner-shareable domain) observing the MMIO writes and inner-shareable barriers are sufficient for that. The device mapping of the MMIO registers will then ensure that they arrive at the endpoint in that order too. > But never this combination: > > (normal access 2; normal access 1) > (mmio write 1; mmio write 2) > > > But hack something together, and I'll look at your v3 to see what's going > > on. > > Please do, hopefully the full code makes more sense. Hopefully, as I don't grok how this deals with spurious interrupts if it only does MMIO writes. Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel