From: Will Deacon <will@kernel.org>
To: Marc Zyngier <maz@kernel.org>
Cc: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org,
James Morse <james.morse@arm.com>,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
qperret@google.com, kernel-team@android.com
Subject: Re: [PATCH 3/4] KVM: arm64: Rename SCTLR_ELx_FLAGS to SCTLR_EL2_FLAGS
Date: Wed, 10 Mar 2021 16:15:47 +0000 [thread overview]
Message-ID: <20210310161546.GC29834@willie-the-truck> (raw)
In-Reply-To: <874khjxade.wl-maz@kernel.org>
On Wed, Mar 10, 2021 at 04:05:17PM +0000, Marc Zyngier wrote:
> On Wed, 10 Mar 2021 15:46:26 +0000,
> Will Deacon <will@kernel.org> wrote:
> >
> > On Wed, Mar 10, 2021 at 03:26:55PM +0000, Marc Zyngier wrote:
> > > Only the nVHE EL2 code is using this define, so let's make it
> > > plain that it is EL2 only.
> > >
> > > Signed-off-by: Marc Zyngier <maz@kernel.org>
> > > ---
> > > arch/arm64/include/asm/sysreg.h | 2 +-
> > > arch/arm64/kvm/hyp/nvhe/hyp-init.S | 2 +-
> > > 2 files changed, 2 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> > > index dfd4edbfe360..9d1aef631646 100644
> > > --- a/arch/arm64/include/asm/sysreg.h
> > > +++ b/arch/arm64/include/asm/sysreg.h
> > > @@ -579,7 +579,7 @@
> > > #define SCTLR_ELx_A (BIT(1))
> > > #define SCTLR_ELx_M (BIT(0))
> > >
> > > -#define SCTLR_ELx_FLAGS (SCTLR_ELx_M | SCTLR_ELx_A | SCTLR_ELx_C | \
> > > +#define SCTLR_EL2_FLAGS (SCTLR_ELx_M | SCTLR_ELx_A | SCTLR_ELx_C | \
> > > SCTLR_ELx_SA | SCTLR_ELx_I | SCTLR_ELx_IESB)
> > >
> > > /* SCTLR_EL2 specific flags. */
> > > diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-init.S b/arch/arm64/kvm/hyp/nvhe/hyp-init.S
> > > index 4eb584ae13d9..7423f4d961a4 100644
> > > --- a/arch/arm64/kvm/hyp/nvhe/hyp-init.S
> > > +++ b/arch/arm64/kvm/hyp/nvhe/hyp-init.S
> > > @@ -122,7 +122,7 @@ alternative_else_nop_endif
> > > * as well as the EE bit on BE. Drop the A flag since the compiler
> > > * is allowed to generate unaligned accesses.
> > > */
> > > - mov_q x0, (SCTLR_EL2_RES1 | (SCTLR_ELx_FLAGS & ~SCTLR_ELx_A))
> > > + mov_q x0, (SCTLR_EL2_RES1 | (SCTLR_EL2_FLAGS & ~SCTLR_ELx_A))
> >
> > Can we just drop SCTLR_ELx_A from SCTLR_EL2_FLAGS instead of clearing it
> > here?
>
> Absolutely. That'd actually be an improvement.
In fact, maybe just define INIT_SCTLR_EL2_MMU_ON to mirror what we do for
EL1 (i.e. including the RES1 bits) and then use that here?
Will
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next prev parent reply other threads:[~2021-03-10 16:17 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-10 15:26 [PATCH 0/4] KVM: arm64: Running the EL2 nVHE code with WXN Marc Zyngier
2021-03-10 15:26 ` [PATCH 1/4] arm64: Use INIT_SCTLR_EL1_MMU_OFF to disable the MMU on CPU restart Marc Zyngier
2021-03-10 15:26 ` [PATCH 2/4] KVM: arm64: Use INIT_SCTLR_EL2_MMU_OFF to disable the MMU on KVM teardown Marc Zyngier
2021-03-10 15:26 ` [PATCH 3/4] KVM: arm64: Rename SCTLR_ELx_FLAGS to SCTLR_EL2_FLAGS Marc Zyngier
2021-03-10 15:46 ` Will Deacon
2021-03-10 16:05 ` Marc Zyngier
2021-03-10 16:15 ` Will Deacon [this message]
2021-03-10 17:49 ` Marc Zyngier
2021-03-10 18:20 ` Will Deacon
2021-03-11 11:35 ` Mark Rutland
2021-03-11 12:00 ` Mark Rutland
2021-03-10 15:26 ` [PATCH 4/4] KVM: arm64: Force SCTLR_EL2.WXN when running nVHE Marc Zyngier
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