From: Ard Biesheuvel <ardb@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Cc: Ard Biesheuvel <ardb@kernel.org>,
Mark Salter <msalter@redhat.com>, Will Deacon <will@kernel.org>,
James Morse <james.morse@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Steve Capper <steve.capper@arm.com>,
Anshuman Khandual <anshuman.khandual@arm.com>
Subject: [PATCH 3/5] arm64: mm: use a compile time constant for vabits_actual when possible
Date: Wed, 10 Mar 2021 18:15:13 +0100 [thread overview]
Message-ID: <20210310171515.416643-4-ardb@kernel.org> (raw)
In-Reply-To: <20210310171515.416643-1-ardb@kernel.org>
The size of the kernel VA space is a compile time constant unless the
kernel is built to support 52-bit virtual addressing, which today is
only supported on 64k page size kernels (although this has recently
changed in the architecture).
This means that in many configurations, vabits_actual can never deviate
from its build time default, making it rather pointless to carry this
value in a variable. So use a compile time constant for vabits_actual
unless it can really assume different values.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
arch/arm64/include/asm/memory.h | 4 ++++
arch/arm64/kernel/head.S | 12 ++++++------
arch/arm64/mm/mmu.c | 2 ++
3 files changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index c759faf7a1ff..501c5c87ec0a 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -179,7 +179,11 @@
#include <linux/types.h>
#include <asm/bug.h>
+#ifdef CONFIG_ARM64_VA_BITS_52
extern u64 vabits_actual;
+#else
+#define vabits_actual ((u64)VA_BITS)
+#endif
extern s64 memstart_addr;
/* PHYS_OFFSET - the physical address of the start of memory. */
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 0b0387644dc0..f65d17a90204 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -294,16 +294,16 @@ SYM_FUNC_START_LOCAL(__create_page_tables)
#ifdef CONFIG_ARM64_VA_BITS_52
mrs_s x6, SYS_ID_AA64MMFR2_EL1
- and x6, x6, #(0xf << ID_AA64MMFR2_LVA_SHIFT)
- mov x5, #52
- cbnz x6, 1f
-#endif
- mov x5, #VA_BITS_MIN
-1:
+ tst x6, #(0xf << ID_AA64MMFR2_LVA_SHIFT)
+ mov x5, #VA_BITS
+ mov x6, #VA_BITS_MIN
+ csel x5, x5, x6, ne
+
adr_l x6, vabits_actual
str x5, [x6]
dmb sy
dc ivac, x6 // Invalidate potentially stale cache line
+#endif
/*
* VA_BITS may be too small to allow for an ID mapping to be created
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index 4c5603c41870..338658cd1bea 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -43,8 +43,10 @@
u64 idmap_t0sz = TCR_T0SZ(VA_BITS_MIN);
u64 idmap_ptrs_per_pgd = PTRS_PER_PGD;
+#ifdef CONFIG_ARM64_VA_BITS_52
u64 __section(".mmuoff.data.write") vabits_actual;
EXPORT_SYMBOL(vabits_actual);
+#endif
u64 kimage_voffset __ro_after_init;
EXPORT_SYMBOL(kimage_voffset);
--
2.30.1
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next prev parent reply other threads:[~2021-03-10 17:17 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-10 17:15 [PATCH 0/5] arm64: some 52-bit cleanups Ard Biesheuvel
2021-03-10 17:15 ` [PATCH 1/5] arm64: mm: use a 48-bit ID map when possible on 52-bit VA builds Ard Biesheuvel
2021-03-11 9:46 ` Will Deacon
2021-03-11 11:58 ` Ard Biesheuvel
2021-03-10 17:15 ` [PATCH 2/5] arm64: mm: remove unused __cpu_uses_extended_idmap[_level()] Ard Biesheuvel
2021-03-10 17:15 ` Ard Biesheuvel [this message]
2021-03-11 9:49 ` [PATCH 3/5] arm64: mm: use a compile time constant for vabits_actual when possible Will Deacon
2021-03-11 17:23 ` Ard Biesheuvel
2021-03-11 18:44 ` Will Deacon
2021-03-11 18:52 ` Ard Biesheuvel
2021-03-10 17:15 ` [PATCH 4/5] arm64: mm: get rid of idmap_ptrs_per_pgd handling Ard Biesheuvel
2021-03-10 17:15 ` [PATCH 5/5] arm64: mm: switch to 52-bit ID map on 52-bit VA capable systems Ard Biesheuvel
2021-03-11 13:26 ` [PATCH 0/5] arm64: some 52-bit cleanups Will Deacon
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