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Tue, 30 Mar 2021 06:13:10 -0500 Received: from DFLE101.ent.ti.com (10.64.6.22) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Tue, 30 Mar 2021 06:13:10 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Tue, 30 Mar 2021 06:13:10 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12UBD9sO022539; Tue, 30 Mar 2021 06:13:09 -0500 Date: Tue, 30 Mar 2021 16:43:08 +0530 From: Pratyush Yadav To: Brad Larson CC: , , , , , , , , , , , , , Subject: Re: [PATCH v2 02/13] spi: cadence-quadspi: Add QSPI support for Pensando Elba SoC Message-ID: <20210330111308.7jjyj7nir6gmjnsv@ti.com> References: <20210329015938.20316-1-brad@pensando.io> <20210329015938.20316-3-brad@pensando.io> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210329015938.20316-3-brad@pensando.io> User-Agent: NeoMutt/20171215 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210330_121321_555603_6E4790E6 X-CRM114-Status: GOOD ( 18.77 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 28/03/21 06:59PM, Brad Larson wrote: > Add QSPI controller support for Pensando Elba SoC > > Signed-off-by: Brad Larson > --- > drivers/spi/spi-cadence-quadspi.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c > index 52ddb3255d88..4aacb0b2dbc7 100644 > --- a/drivers/spi/spi-cadence-quadspi.c > +++ b/drivers/spi/spi-cadence-quadspi.c > @@ -1353,6 +1353,7 @@ static int cqspi_request_mmap_dma(struct cqspi_st *cqspi) > cqspi->rx_chan = dma_request_chan_by_mask(&mask); > if (IS_ERR(cqspi->rx_chan)) { > int ret = PTR_ERR(cqspi->rx_chan); > + Unrelated whitespace change. Please move it into a separate cleanup patch. > cqspi->rx_chan = NULL; > return dev_err_probe(&cqspi->pdev->dev, ret, "No Rx DMA available\n"); > } > @@ -1633,6 +1634,10 @@ static const struct cqspi_driver_platdata intel_lgm_qspi = { > .quirks = CQSPI_DISABLE_DAC_MODE, > }; > > +static const struct cqspi_driver_platdata pen_cdns_qspi = { > + .quirks = CQSPI_NEEDS_WR_DELAY | CQSPI_DISABLE_DAC_MODE, > +}; > + > static const struct of_device_id cqspi_dt_ids[] = { > { > .compatible = "cdns,qspi-nor", > @@ -1650,6 +1655,10 @@ static const struct of_device_id cqspi_dt_ids[] = { > .compatible = "intel,lgm-qspi", > .data = &intel_lgm_qspi, > }, > + { > + .compatible = "pensando,cdns-qspi", > + .data = &pen_cdns_qspi, > + }, > { /* end of table */ } > }; > > -- > 2.17.1 > Rest of the patch looks good to me. -- Regards, Pratyush Yadav Texas Instruments Inc. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel