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Received: from twspam01.aspeedtech.com ([211.20.114.71]) by casper.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1ldWHu-00EyZu-1F for linux-arm-kernel@lists.infradead.org; Mon, 03 May 2021 10:58:57 +0000 Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 143Akm0o036864; Mon, 3 May 2021 18:46:48 +0800 (GMT-8) (envelope-from steven_lee@aspeedtech.com) Received: from aspeedtech.com (192.168.100.253) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 3 May 2021 18:58:27 +0800 Date: Mon, 3 May 2021 18:58:19 +0800 From: Steven Lee To: Andrew Jeffery CC: Rob Herring , Joel Stanley , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/ASPEED MACHINE SUPPORT" , "moderated list:ARM/ASPEED MACHINE SUPPORT" , open list , Hongwei Zhang , Ryan Chen , Chin-Ting Kuo Subject: Re: [PATCH v2 2/3] ARM: dts: aspeed: ast2600evb: Add timing-phase property for eMMC controller Message-ID: <20210503105819.GC12520@aspeedtech.com> References: <20210503014336.20256-1-steven_lee@aspeedtech.com> <20210503014336.20256-3-steven_lee@aspeedtech.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) X-Originating-IP: [192.168.100.253] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 143Akm0o036864 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210503_115856_455315_860F9B94 X-CRM114-Status: GOOD ( 15.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The 05/03/2021 13:07, Andrew Jeffery wrote: > Hi Steven, > > On Mon, 3 May 2021, at 11:13, Steven Lee wrote: > > Set eMMC input clock phase to 3, which is more stable on AST2600 EVBs. > > > > Signed-off-by: Steven Lee > > --- > > arch/arm/boot/dts/aspeed-ast2600-evb.dts | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/arch/arm/boot/dts/aspeed-ast2600-evb.dts > > b/arch/arm/boot/dts/aspeed-ast2600-evb.dts > > index 2772796e215e..7a93317e27dc 100644 > > --- a/arch/arm/boot/dts/aspeed-ast2600-evb.dts > > +++ b/arch/arm/boot/dts/aspeed-ast2600-evb.dts > > @@ -102,6 +102,7 @@ > > > > &emmc_controller { > > status = "okay"; > > + timing-phase = <0x300FF>; > > Please use the existing binding for phase corrections. The existing > binding is already supported by the driver (added in v5.12). > Hi Andrew, Thanks for the review. I will add the following settings from aspeed-bmc-ibm-rainier.dts instead of adding timing-phase in device tree. clk-phase-mmc-hs200 = ; > Andrew _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel