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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id h59sm787947otb.29.2021.05.06.13.35.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 May 2021 13:35:20 -0700 (PDT) Received: (nullmailer pid 758912 invoked by uid 1000); Thu, 06 May 2021 20:35:19 -0000 Date: Thu, 6 May 2021 15:35:19 -0500 From: Rob Herring To: Benjamin Gaignard Cc: joro@8bytes.org, will@kernel.org, heiko@sntech.de, xxm@rock-chips.com, iommu@lists.linux-foundation.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com Subject: Re: [PATCH v3 1/4] dt-bindings: iommu: rockchip: Convert IOMMU to DT schema Message-ID: <20210506203519.GA754007@robh.at.kernel.org> References: <20210504084124.131884-1-benjamin.gaignard@collabora.com> <20210504084124.131884-2-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210504084124.131884-2-benjamin.gaignard@collabora.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210506_133522_540115_780CD8D5 X-CRM114-Status: GOOD ( 25.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, May 04, 2021 at 10:41:21AM +0200, Benjamin Gaignard wrote: > Convert Rockchip IOMMU to DT schema > > Signed-off-by: Benjamin Gaignard > --- > version 2: > - Change maintainer > - Change reg maxItems > - Change interrupt maxItems > > .../bindings/iommu/rockchip,iommu.txt | 38 --------- > .../bindings/iommu/rockchip,iommu.yaml | 79 +++++++++++++++++++ > 2 files changed, 79 insertions(+), 38 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/iommu/rockchip,iommu.txt > create mode 100644 Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml > > diff --git a/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt b/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt > deleted file mode 100644 > index 6ecefea1c6f9..000000000000 > --- a/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt > +++ /dev/null > @@ -1,38 +0,0 @@ > -Rockchip IOMMU > -============== > - > -A Rockchip DRM iommu translates io virtual addresses to physical addresses for > -its master device. Each slave device is bound to a single master device, and > -shares its clocks, power domain and irq. > - > -Required properties: > -- compatible : Should be "rockchip,iommu" > -- reg : Address space for the configuration registers > -- interrupts : Interrupt specifier for the IOMMU instance > -- interrupt-names : Interrupt name for the IOMMU instance > -- #iommu-cells : Should be <0>. This indicates the iommu is a > - "single-master" device, and needs no additional information > - to associate with its master device. See: > - Documentation/devicetree/bindings/iommu/iommu.txt > -- clocks : A list of clocks required for the IOMMU to be accessible by > - the host CPU. > -- clock-names : Should contain the following: > - "iface" - Main peripheral bus clock (PCLK/HCL) (required) > - "aclk" - AXI bus clock (required) > - > -Optional properties: > -- rockchip,disable-mmu-reset : Don't use the mmu reset operation. > - Some mmu instances may produce unexpected results > - when the reset operation is used. > - > -Example: > - > - vopl_mmu: iommu@ff940300 { > - compatible = "rockchip,iommu"; > - reg = <0xff940300 0x100>; > - interrupts = ; > - interrupt-names = "vopl_mmu"; > - clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; > - clock-names = "aclk", "iface"; > - #iommu-cells = <0>; > - }; > diff --git a/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml b/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml > new file mode 100644 > index 000000000000..0db208cf724a > --- /dev/null > +++ b/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml > @@ -0,0 +1,79 @@ > +# SPDX-License-Identifier: GPL-2.0-only > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/iommu/rockchip,iommu.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Rockchip IOMMU > + > +maintainers: > + - Heiko Stuebner > + > +description: |+ > + A Rockchip DRM iommu translates io virtual addresses to physical addresses for > + its master device. Each slave device is bound to a single master device and > + shares its clocks, power domain and irq. > + > + For information on assigning IOMMU controller to its peripheral devices, > + see generic IOMMU bindings. > + > +properties: > + compatible: > + const: rockchip,iommu > + > + reg: > + minItems: 1 > + maxItems: 2 What's the 2nd entry? If there's only 1 entry, then you don't have to describe what it is. If more than 1, then each entry has to be defined. > + > + interrupts: > + minItems: 1 > + maxItems: 2 Same here, though if interrupt-names defines them, that's good enough. > + > + interrupt-names: > + minItems: 1 > + maxItems: 2 Here we need the values. > + > + clocks: > + items: > + - description: Core clock > + - description: Interface clock > + > + clock-names: > + items: > + - const: aclk > + - const: iface > + > + "#iommu-cells": > + const: 0 > + > + rockchip,disable-mmu-reset: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + Do not use the mmu reset operation. > + Some mmu instances may produce unexpected results > + when the reset operation is used. > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - clock-names > + - "#iommu-cells" > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + > + vopl_mmu: iommu@ff940300 { > + compatible = "rockchip,iommu"; > + reg = <0xff940300 0x100>; > + interrupts = ; > + interrupt-names = "vopl_mmu"; > + clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; > + clock-names = "aclk", "iface"; > + #iommu-cells = <0>; > + }; > -- > 2.25.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel