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Wed, 12 May 2021 13:30:03 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 642026D; Wed, 12 May 2021 06:29:59 -0700 (PDT) Received: from C02TD0UTHF1T.local (unknown [10.57.72.67]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3A7AB3F718; Wed, 12 May 2021 06:29:58 -0700 (PDT) Date: Wed, 12 May 2021 14:29:53 +0100 From: Mark Rutland To: Catalin Marinas Cc: linux-arm-kernel@lists.infradead.org, Will Deacon , Suzuki K Poulose Subject: Re: [PATCH 1/2] arm64: Change the cpuinfo_arm64 member type for some sysregs to u64 Message-ID: <20210512132953.GC93815@C02TD0UTHF1T.local> References: <20210511182322.3830-1-catalin.marinas@arm.com> <20210511182322.3830-2-catalin.marinas@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210511182322.3830-2-catalin.marinas@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210512_063001_947121_F759D766 X-CRM114-Status: GOOD ( 22.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, May 11, 2021 at 07:23:21PM +0100, Catalin Marinas wrote: > The architecture has been updated and the CTR_EL0, CNTFRQ_EL1, > DCZID_EL0, MIDR_EL1, REVIDR_EL1 registers are all 64-bit, even if most > of them have a RES0 top 32-bit. > > Change their type to u64 in struct cpuinfo_arm64. > > Signed-off-by: Catalin Marinas > Cc: Will Deacon > Cc: Mark Rutland > Cc: Suzuki K Poulose Acked-by: Mark Rutland Mark. > --- > > CTR_EL0 gained a new field with MTE in the top 32-bit, TminLine. I have > no idea what software is supposed to do with this field. I even have a > Jira ticket from 2019 asking for it to be removed. So I don't think we > should bother adding the mask/checks for it to the kernel. > > arch/arm64/include/asm/cpu.h | 10 +++++----- > arch/arm64/kernel/cpuinfo.c | 2 +- > 2 files changed, 6 insertions(+), 6 deletions(-) > > diff --git a/arch/arm64/include/asm/cpu.h b/arch/arm64/include/asm/cpu.h > index 7faae6ff3ab4..fe5a8499ddc2 100644 > --- a/arch/arm64/include/asm/cpu.h > +++ b/arch/arm64/include/asm/cpu.h > @@ -15,11 +15,11 @@ > struct cpuinfo_arm64 { > struct cpu cpu; > struct kobject kobj; > - u32 reg_ctr; > - u32 reg_cntfrq; > - u32 reg_dczid; > - u32 reg_midr; > - u32 reg_revidr; > + u64 reg_ctr; > + u64 reg_cntfrq; > + u64 reg_dczid; > + u64 reg_midr; > + u64 reg_revidr; > > u64 reg_id_aa64dfr0; > u64 reg_id_aa64dfr1; > diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c > index 77605aec25fe..4bea701117d4 100644 > --- a/arch/arm64/kernel/cpuinfo.c > +++ b/arch/arm64/kernel/cpuinfo.c > @@ -246,7 +246,7 @@ static struct kobj_type cpuregs_kobj_type = { > struct cpuinfo_arm64 *info = kobj_to_cpuinfo(kobj); \ > \ > if (info->reg_midr) \ > - return sprintf(buf, "0x%016x\n", info->reg_##_field); \ > + return sprintf(buf, "0x%016llx\n", info->reg_##_field); \ > else \ > return 0; \ > } \ _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel