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Thu, 13 May 2021 02:15:42 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id A78DE61108; Thu, 13 May 2021 02:15:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1620872141; bh=YtB5ucUvpAZ5on+ORipj1YYtnYvBijEjhMlsIGH98Uk=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=beefXncwG8RzASycRJnUvsGWDnev2Bo7H0v0MoZDsvYnO+z3NONT5dZiyjJadwevv rgnbGVTkBqkhSXNBjyjtz2NxNssLtonbUj30OPwXLQrXXtupD+Lwh8qdNma14Qr97n /gSHbBQsKWtFybYEvZdpgeR6sI3DThk3ank9G6Bxm988wL3H0v40uR8cVuMFA0huD+ ANRHKmZe83+gLjPRxJ2+GdkJhOcLRTUhUYL4Nk89PfQE8tvj6EQJ2dzLfR95itNkJn cBdbcsSE6pvEMsAzE62SBCDQgDJmn2QCNj+LEKu7pQ0ZXUtLZbiLmN7TVS5E79R0Ch caf9SQY3bo9CQ== Date: Thu, 13 May 2021 10:15:35 +0800 From: Shawn Guo To: Michael Walle , Bhaskar Upadhaya Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Li Yang , Rob Herring , Catalin Marinas , Will Deacon Subject: Re: [PATCH 1/2] arm64: dts: ls1028a: fix memory node Message-ID: <20210513021535.GK3425@dragon> References: <20210408110219.20149-1-michael@walle.cc> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210408110219.20149-1-michael@walle.cc> User-Agent: Mutt/1.9.4 (2018-02-28) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210512_191541_709678_F02D0993 X-CRM114-Status: GOOD ( 18.49 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org + Bhaskar On Thu, Apr 08, 2021 at 01:02:18PM +0200, Michael Walle wrote: > While enabling EDAC support for the LS1028A it was discovered that the > memory node has a wrong endianness setting as well as a wrong interrupt > assignment. Fix both. > > This was tested on a sl28 board. To force ECC errors, you can use the > error injection supported by the controller in hardware (with > CONFIG_EDAC_DEBUG enabled): > > # enable error injection > $ echo 0x100 > /sys/devices/system/edac/mc/mc0/inject_ctrl > # flip lowest bit of the data > $ echo 0x1 > /sys/devices/system/edac/mc/mc0/inject_data_lo > > Fixes: 8897f3255c9c ("arm64: dts: Add support for NXP LS1028A SoC") > Signed-off-by: Michael Walle Bhaskar, Does it look good to you? Shawn > --- > arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > index 9506f0669ead..040a3e529bf1 100644 > --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > @@ -197,8 +197,8 @@ > ddr: memory-controller@1080000 { > compatible = "fsl,qoriq-memory-controller"; > reg = <0x0 0x1080000 0x0 0x1000>; > - interrupts = ; > - big-endian; > + interrupts = ; > + little-endian; > }; > > dcfg: syscon@1e00000 { > -- > 2.20.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel