Re: [PATCH v2 07/19] arm64: entry: convert IRQ+FIQ handlers to C

Joey Gouly
2021-05-21T13:21:27Z

Hi Mark,

On Wed, May 19, 2021 at 01:38:50PM +0100, Mark Rutland wrote:
> For various reasons we'd like to convert the bulk of arm64's exception
> triage logic to C. As a step towards that, this patch converts the EL1
> and EL0 IRQ+FIQ triage logic to C.
>
> Separate C functions are added for the native and compat cases so that
> in subsequent patches we can handle native/compat differences in C.
>
> Since the triage functions can now call arm64_apply_bp_hardening()
> directly, the do_el0_irq_bp_hardening() wrapper function is removed.
>
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: James Morse <james.morse@arm.com>
> Cc: Marc Zyngier <maz@kernel.org>
> Cc: Will Deacon <will@kernel.org>
> ---
> arch/arm64/include/asm/exception.h | 8 ++-
> arch/arm64/include/asm/processor.h | 2 -
> arch/arm64/kernel/entry-common.c | 86 +++++++++++++++++++++++++++++++--
> arch/arm64/kernel/entry.S | 99 ++++++--------------------------------
> arch/arm64/mm/fault.c | 7 ---
> 5 files changed, 102 insertions(+), 100 deletions(-)

[..]

>
> diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
> index 327a559679f7..eebc6e72125c 100644
> --- a/arch/arm64/kernel/entry.S
> +++ b/arch/arm64/kernel/entry.S
> @@ -486,63 +486,12 @@ SYM_CODE_START_LOCAL(__swpan_exit_el0)
> SYM_CODE_END(__swpan_exit_el0)
> #endif
>
> - .macro irq_stack_entry
> - mov x19, sp // preserve the original sp
> -#ifdef CONFIG_SHADOW_CALL_STACK
> - mov x24, scs_sp // preserve the original shadow stack
> -#endif
> -
> - /*
> - * Compare sp with the base of the task stack.
> - * If the top ~(THREAD_SIZE - 1) bits match, we are on a task stack,
> - * and should switch to the irq stack.
> - */
> - ldr x25, [tsk, TSK_STACK]
> - eor x25, x25, x19
> - and x25, x25, #~(THREAD_SIZE - 1)
> - cbnz x25, 9998f
> -
> - ldr_this_cpu x25, irq_stack_ptr, x26
> - mov x26, #IRQ_STACK_SIZE
> - add x26, x25, x26
> -
> - /* switch to the irq stack */
> - mov sp, x26
> -
> -#ifdef CONFIG_SHADOW_CALL_STACK
> - /* also switch to the irq shadow stack */
> - ldr_this_cpu scs_sp, irq_shadow_call_stack_ptr, x26
> -#endif
> -
> -9998:
> - .endm
> -
> - /*
> - * The callee-saved regs (x19-x29) should be preserved between
> - * irq_stack_entry and irq_stack_exit, but note that kernel_entry
> - * uses x20-x23 to store data for later use.
> - */
> - .macro irq_stack_exit
> - mov sp, x19
> -#ifdef CONFIG_SHADOW_CALL_STACK
> - mov scs_sp, x24
> -#endif
> - .endm
> -
> /* GPRs used by entry code */
> tsk .req x28 // current thread_info
>
> /*
> * Interrupt handling.
> */
> - .macro irq_handler, handler:req
> - ldr_l x1, \handler
> - mov x0, sp
> - irq_stack_entry
> - blr x1
> - irq_stack_exit
> - .endm
> -
> .macro gic_prio_kentry_setup, tmp:req
> #ifdef CONFIG_ARM64_PSEUDO_NMI
> alternative_if ARM64_HAS_IRQ_PRIO_MASKING
> @@ -552,32 +501,6 @@ tsk .req x28 // current thread_info
> #endif
> .endm
>
> - .macro el1_interrupt_handler, handler:req
> - enable_da
> -
> - mov x0, sp
> - bl enter_el1_irq_or_nmi
> -
> - irq_handler \handler
> -
> -#ifdef CONFIG_PREEMPTION
> - bl arm64_preempt_schedule_irq // irq en/disable is done inside
> -#endif
> -
> - mov x0, sp
> - bl exit_el1_irq_or_nmi
> - .endm
> -
> - .macro el0_interrupt_handler, handler:req
> - user_exit_irqoff

Nothing is using the user_exit_irqoff macro anymore, it could be
removed?

> - enable_da
> -
> - tbz x22, #55, 1f
> - bl do_el0_irq_bp_hardening
> -1:
> - irq_handler \handler
> - .endm
> -

[..]

Reviewed-by: Joey Gouly <joey.gouly@arm.com>

Thanks,
Joey