Re: [PATCH v3 15/18] arm64: __clean_dcache_area_pou to take end parameter instead of size

Mark Rutland
2021-05-20T16:26:26Z

On Thu, May 20, 2021 at 01:44:03PM +0100, Fuad Tabba wrote:
> To be consistent with other functions with similar names and
> functionality in cacheflush.h, cache.S, and cachetlb.rst, change
> to specify the range in terms of start and end, as opposed to
> start and size.
>
> No functional change intended.
>
> Reported-by: Will Deacon <will@kernel.org>
> Signed-off-by: Fuad Tabba <tabba@google.com>

Acked-by: Mark Rutland <mark.rutland@arm.com>

Mark.

> ---
> arch/arm64/include/asm/cacheflush.h | 2 +-
> arch/arm64/mm/cache.S | 9 ++++-----
> arch/arm64/mm/flush.c | 2 +-
> 3 files changed, 6 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm64/include/asm/cacheflush.h b/arch/arm64/include/asm/cacheflush.h
> index fa5641868d65..f86723047315 100644
> --- a/arch/arm64/include/asm/cacheflush.h
> +++ b/arch/arm64/include/asm/cacheflush.h
> @@ -62,7 +62,7 @@ extern void __flush_dcache_area(unsigned long start, unsigned long end);
> extern void __inval_dcache_area(unsigned long start, unsigned long end);
> extern void __clean_dcache_area_poc(unsigned long start, unsigned long end);
> extern void __clean_dcache_area_pop(unsigned long start, unsigned long end);
> -extern void __clean_dcache_area_pou(void *addr, size_t len);
> +extern void __clean_dcache_area_pou(unsigned long start, unsigned long end);
> extern long __flush_cache_user_range(unsigned long start, unsigned long end);
> extern void sync_icache_aliases(void *kaddr, unsigned long len);
>
> diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S
> index b72fbae4b8e9..b70a6699c02b 100644
> --- a/arch/arm64/mm/cache.S
> +++ b/arch/arm64/mm/cache.S
> @@ -120,20 +120,19 @@ SYM_FUNC_START_PI(__flush_dcache_area)
> SYM_FUNC_END_PI(__flush_dcache_area)
>
> /*
> - * __clean_dcache_area_pou(kaddr, size)
> + * __clean_dcache_area_pou(start, end)
> *
> - * Ensure that any D-cache lines for the interval [kaddr, kaddr+size)
> + * Ensure that any D-cache lines for the interval [start, end)
> * are cleaned to the PoU.
> *
> - * - kaddr - kernel address
> - * - size - size in question
> + * - start - virtual start address of region
> + * - end - virtual end address of region
> */
> SYM_FUNC_START(__clean_dcache_area_pou)
> alternative_if ARM64_HAS_CACHE_IDC
> dsb ishst
> ret
> alternative_else_nop_endif
> - add x1, x0, x1
> dcache_by_line_op cvau, ish, x0, x1, x2, x3
> ret
> SYM_FUNC_END(__clean_dcache_area_pou)
> diff --git a/arch/arm64/mm/flush.c b/arch/arm64/mm/flush.c
> index 5aba7fe42d4b..a69d745fb1dc 100644
> --- a/arch/arm64/mm/flush.c
> +++ b/arch/arm64/mm/flush.c
> @@ -19,7 +19,7 @@ void sync_icache_aliases(void *kaddr, unsigned long len)
> unsigned long addr = (unsigned long)kaddr;
>
> if (icache_is_aliasing()) {
> - __clean_dcache_area_pou(kaddr, len);
> + __clean_dcache_area_pou(kaddr, kaddr + len);
> __flush_icache_all();
> } else {
> /*
> --
> 2.31.1.751.gd2f1c929bd-goog