From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC453C4707F for ; Tue, 25 May 2021 06:28:10 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A528061413 for ; Tue, 25 May 2021 06:28:10 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A528061413 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Fk2iQ9W3q+KTFmvhodRtv75EkzyRK9BkRxWh58XRhVs=; b=ekfe2VJbtAmv2a MQQliGgGvSvC78X0CUx+y8Vi/LdYwZ3pDugQmvPKJ1Trl4xwqFwhPJ1J8pxqVEtI7pyIzvQmsEcvk JLbCiAnbU0HIKsq18qVhyP9eJ1L9sCytS/NCUpoNTkYmi3G9Y5dO/7szMce/xenciFokfVt8hq3I/ mER4cXZV9lriyoe8033qpgStv90aznkuJjGUdBX4PnaLqSnjUa/gRNEyiEKqhdaHsgWUWHfShWXpW JHlD3taq602iiMtrWsAnridO6Le0Yw8C6JVz69gsC3/UJhqYbmzsyZT0Qmq7h3fx+/gdU5ZsNHkuf epS1B9ZzpIO14p1hoN0Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1llQWI-003c0w-59; Tue, 25 May 2021 06:26:26 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1llQVU-003bqr-UC for linux-arm-kernel@lists.infradead.org; Tue, 25 May 2021 06:25:39 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2857C1042; Mon, 24 May 2021 23:25:34 -0700 (PDT) Received: from optiplex-7070.shanghai.arm.com (optiplex-7070.shanghai.arm.com [10.169.188.115]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 51B1D3F73D; Mon, 24 May 2021 23:25:32 -0700 (PDT) From: Jaxson Han To: mark.rutland@arm.com, andre.przywara@arm.com Cc: linux-arm-kernel@lists.infradead.org, wei.chen@arm.com, jaxson.han@arm.com Subject: [boot-wrapper PATCH v3 2/8] aarch64: Rename labels and prepare for lower EL booting Date: Tue, 25 May 2021 14:25:03 +0800 Message-Id: <20210525062509.201464-3-jaxson.han@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210525062509.201464-1-jaxson.han@arm.com> References: <20210525062509.201464-1-jaxson.han@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210524_232537_107203_EB8C30D2 X-CRM114-Status: GOOD ( 10.40 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Prepare for booting from lower EL. Rename *_el3 relavant labels with *_el_max and *_no_el3 with *_keep_el. Since the original _no_el3 means "We neither do init sequence at this highest EL nor drop to lower EL when entering to kernel", we rename it with _keep_el to make it more clear for lower EL initialisation. Signed-off-by: Jaxson Han --- arch/aarch64/boot.S | 31 +++++++++++++++++++++---------- arch/aarch64/psci.S | 13 +++++++------ arch/aarch64/spin.S | 8 ++++---- 3 files changed, 32 insertions(+), 20 deletions(-) diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S index a9264de..1a5da35 100644 --- a/arch/aarch64/boot.S +++ b/arch/aarch64/boot.S @@ -12,7 +12,7 @@ .section .init .globl _start - .globl jump_kernel + .globl jump_kernel _start: cpuid x0, x1 @@ -22,20 +22,31 @@ _start: bl setup_stack /* - * EL3 initialisation + * Boot sequence + * If CurrentEL == EL3, then goto EL3 initialisation and drop to + * lower EL before entering the kernel. + * Else, no initialisation and keep the current EL before + * entering the kernel. */ mrs x0, CurrentEL cmp x0, #CURRENTEL_EL3 - b.eq 1f + beq el3_init + /* + * We stay in the current EL for entering the kernel + */ mov w0, #1 - ldr x1, =flag_no_el3 + ldr x1, =flag_keep_el str w0, [x1] bl setup_stack - b start_no_el3 + b start_keep_el -1: mov x0, #0x30 // RES1 + /* + * EL3 initialisation + */ +el3_init: + mov x0, #0x30 // RES1 orr x0, x0, #(1 << 0) // Non-secure EL1 orr x0, x0, #(1 << 8) // HVC enable @@ -114,7 +125,7 @@ _start: bl gic_secure_init - b start_el3 + b start_el_max err_invalid_id: b . @@ -141,7 +152,7 @@ jump_kernel: bl find_logical_id bl setup_stack // Reset stack pointer - ldr w0, flag_no_el3 + ldr w0, flag_keep_el cmp w0, #0 // Prepare Z flag mov x0, x20 @@ -150,7 +161,7 @@ jump_kernel: mov x3, x23 b.eq 1f - br x19 // No EL3 + br x19 // Keep current EL 1: mov x4, #SPSR_KERNEL @@ -168,5 +179,5 @@ jump_kernel: .data .align 3 -flag_no_el3: +flag_keep_el: .long 0 diff --git a/arch/aarch64/psci.S b/arch/aarch64/psci.S index 01ebe7d..ae02fd6 100644 --- a/arch/aarch64/psci.S +++ b/arch/aarch64/psci.S @@ -45,8 +45,8 @@ vector: .text - .globl start_no_el3 - .globl start_el3 + .globl start_keep_el + .globl start_el_max err_exception: b err_exception @@ -101,7 +101,7 @@ smc_exit: eret -start_el3: +start_el_max: ldr x0, =vector bl setup_vector @@ -111,10 +111,11 @@ start_el3: b psci_first_spin /* - * This PSCI implementation requires EL3. Without EL3 we'll only boot the - * primary cpu, all others will be trapped in an infinite loop. + * This PSCI implementation requires the highest EL(EL3 or Armv8-R EL2). + * Without the highest EL, we'll only boot the primary cpu, all others + * will be trapped in an infinite loop. */ -start_no_el3: +start_keep_el: cpuid x0, x1 bl find_logical_id cbz x0, psci_first_spin diff --git a/arch/aarch64/spin.S b/arch/aarch64/spin.S index 72603cf..533177c 100644 --- a/arch/aarch64/spin.S +++ b/arch/aarch64/spin.S @@ -11,11 +11,11 @@ .text - .globl start_no_el3 - .globl start_el3 + .globl start_keep_el + .globl start_el_max -start_el3: -start_no_el3: +start_el_max: +start_keep_el: cpuid x0, x1 bl find_logical_id -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel