From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71B40C47082 for ; Mon, 7 Jun 2021 08:44:54 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3E57A60FE3 for ; Mon, 7 Jun 2021 08:44:54 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3E57A60FE3 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ji1RjRc5T5HNzFEX7zRfns4A+5Zkg7TiKldu+AO9dr8=; b=aFYdLI8fLrCW32 vNthWltjooBtAOdfJ6u37hRXa9EnsDY6YW+LmVi6/Mq0aU+eicMt/SozYkiyb95DXpjtyzkUaymVk uMbHJFLin/2RifBZKJQBYB1vKgkYjyEbcfEuqfP5EUK9sB12/tgVx+i1IarbF1oPFdvYzRPZeV14h wwuB6gTGrvaEH/CxQVjQM7oSGohOzsqt86hpUCyS0rI8j6D6wLQSX6gnedbk5GnMFIShQKHoJuDDH tXHj+cmbywYbmE43hhRiUeLSL3DqWkvdaBwKb1h6BFs42YcMgo5rse7DQUhXqfT5woYkkbQJ4Qaqd H69W7E+kuP0Jkh+linJQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1lqAq3-002NHj-IJ; Mon, 07 Jun 2021 08:42:28 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1lqAl3-002LfY-DE for linux-arm-kernel@lists.infradead.org; Mon, 07 Jun 2021 08:37:20 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BFB9931B; Mon, 7 Jun 2021 01:37:11 -0700 (PDT) Received: from C02TD0UTHF1T.local (unknown [10.57.4.24]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 09E3E3F719; Mon, 7 Jun 2021 01:37:10 -0700 (PDT) Date: Mon, 7 Jun 2021 09:37:04 +0100 From: Mark Rutland To: Shaokun Zhang Cc: linux-arm-kernel@lists.infradead.org, Will Deacon Subject: Re: [PATCH -next] arm64: perf: Fix hw_event_id check in __armv8_pmuv3_map_event Message-ID: <20210607083704.GA97489@C02TD0UTHF1T.local> References: <1623050343-62397-1-git-send-email-zhangshaokun@hisilicon.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1623050343-62397-1-git-send-email-zhangshaokun@hisilicon.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210607_013717_533188_C3D14AFD X-CRM114-Status: GOOD ( 19.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Jun 07, 2021 at 03:19:03PM +0800, Shaokun Zhang wrote: > Raw event SW_INCR (0x0000) shall be included in this check, so fix it. > > Cc: Mark Rutland > Cc: Will Deacon > Signed-off-by: Shaokun Zhang Given that SW_INCR depends on the specific counter used (and userspace has no control over this), I don't think that it makes sense to expose to userspace, much like CHAIN, so I suspect it's better to update the commentary instead. Do you have a need for SW_INCR, or was this found by inspection? Thanks, Mark. > --- > arch/arm64/kernel/perf_event.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c > index a661010308c0..fa2f60d09e15 100644 > --- a/arch/arm64/kernel/perf_event.c > +++ b/arch/arm64/kernel/perf_event.c > @@ -1000,7 +1000,7 @@ static int __armv8_pmuv3_map_event(struct perf_event *event, > event->hw.flags |= ARMPMU_EVT_64BIT; > > /* Only expose micro/arch events supported by this PMU */ > - if ((hw_event_id > 0) && (hw_event_id < ARMV8_PMUV3_MAX_COMMON_EVENTS) > + if ((hw_event_id >= 0) && (hw_event_id < ARMV8_PMUV3_MAX_COMMON_EVENTS) > && test_bit(hw_event_id, armpmu->pmceid_bitmap)) { > return hw_event_id; > } > -- > 2.7.4 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel