From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CADFAC47094 for ; Thu, 10 Jun 2021 04:42:19 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7EFAE613B0 for ; Thu, 10 Jun 2021 04:42:19 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7EFAE613B0 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=aspeedtech.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:CC:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=OZ8ajKTGPi4CvTllBwBzuqHb6jan8lHbF4PyYFNdl0w=; b=te5onZstDWfjEf RXkzfA44izjqQhcmK4p6FhcceCUBqNzpT5EpyrmH6ONDP+iUCn70VWAi18qix5/ZwigfYSW5iRRxB xCtuarVGm4eTUxnGMJrb2uw8j7Thwxqco2att8yFbFBYCmc1eymdhYj4QmUB9UFt2KjuA/sWd6lR7 hQhV4i9vzesBv7P4pf09TOwiyAhFWj/IR7q3HxVF0eXXLOMbRZ/vzg3bh21ZXf6pjKuHdnEzaTaJT rXpAEm2CbOqqUiaehDQvR8nShj2bioV9xez7HlJaRJEo98VUJvK2L1MXUWBD72TVDMruBd2DFfOv8 8NOEMUOaZ2Mzl1VjUqeQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1lrCSE-00Gq7M-SR; Thu, 10 Jun 2021 04:38:07 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1lrCS7-00Gq77-WC for linux-arm-kernel@bombadil.infradead.org; Thu, 10 Jun 2021 04:38:00 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:CC:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=OoAgKRiA9ZSk1orMNwEB/j391vS1WxDBkL5wWNnj5OQ=; b=luqWlFNnJw/i2/bMqq/XKGcEG2 3KZfXs3FO5mYTlQY3fyT6gS7m1+sDDw0eP++j7T2GjK7sGVd8skKknyJPuLdC4IOU/LSd8JeiYS8o U/s8sCHbsQjqIYznoj1h7IMq+grQzyIYxNpi4WXEsEhSxpkA050UjwBlTmih/IX8p/H8ff3at6IQq 7XUgExUoAWBKa0Qgapr6OlR7q1/04HfQfNm5v/HrHrM2OEOnd1JL0gRCd1162oz2z/1dzrz3zfhpP qqBD+RxkUvI5NP56s36sFgOJs6brbisy9I2ojzRgDDqCuGdeYIxGicZiGDgehNfWTPCM591pTqXrK H7lbQFwQ==; Received: from twspam01.aspeedtech.com ([211.20.114.71]) by desiato.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1lrAu9-005Ig9-9a for linux-arm-kernel@lists.infradead.org; Thu, 10 Jun 2021 02:58:59 +0000 Received: from twspam01.aspeedtech.com (localhost [127.0.0.2] (may be forged)) by twspam01.aspeedtech.com with ESMTP id 15A2BgFB033908 for ; Thu, 10 Jun 2021 10:11:42 +0800 (GMT-8) (envelope-from steven_lee@aspeedtech.com) Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 15A2ASoQ033844; Thu, 10 Jun 2021 10:10:28 +0800 (GMT-8) (envelope-from steven_lee@aspeedtech.com) Received: from aspeedtech.com (192.168.100.253) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 10 Jun 2021 10:24:20 +0800 Date: Thu, 10 Jun 2021 10:24:19 +0800 From: Steven Lee To: Linus Walleij CC: Bartosz Golaszewski , Rob Herring , Joel Stanley , Andrew Jeffery , "open list:GPIO SUBSYSTEM" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/ASPEED MACHINE SUPPORT" , "moderated list:ARM/ASPEED MACHINE SUPPORT" , open list , Hongwei Zhang , Ryan Chen , Billy Tsai Subject: Re: [PATCH v5 00/10] ASPEED sgpio driver enhancement. Message-ID: <20210610022416.GA27188@aspeedtech.com> References: <20210608102547.4880-1-steven_lee@aspeedtech.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) X-Originating-IP: [192.168.100.253] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 15A2ASoQ033844 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210610_035856_832650_E7290121 X-CRM114-Status: GOOD ( 20.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The 06/09/2021 18:54, Linus Walleij wrote: > On Tue, Jun 8, 2021 at 12:26 PM Steven Lee wrote: > > > AST2600 SoC has 2 SGPIO master interfaces one with 128 pins another one > > with 80 pins, AST2500/AST2400 SoC has 1 SGPIO master interface that > > supports up to 80 pins. > > In the current driver design, the max number of sgpio pins is hardcoded > > in macro MAX_NR_HW_SGPIO and the value is 80. > > > > For supporting sgpio master interfaces of AST2600 SoC, the patch series > > contains the following enhancement: > > - Convert txt dt-bindings to yaml. > > - Update aspeed-g6 dtsi to support the enhanced sgpio. > > - Define max number of gpio pins in ast2600 platform data. Old chip > > uses the original hardcoded value. > > - Support muiltiple SGPIO master interfaces. > > - Support up to 128 pins. > > - Support wdt reset tolerance. > > - Fix irq_chip issues which causes multiple sgpio devices use the same > > irq_chip data. > > - Replace all of_*() APIs with device_*(). > > > > Changes from v4: > > v5 looks good to me! > > I just need Rob's or another DT persons nod on the bindings (or timeout) > before I merge it. Poke me if nothing happens. > > > ARM: dts: aspeed-g6: Add SGPIO node. > > ARM: dts: aspeed-g5: Remove ngpios from sgpio node. > > These two need to be merged through the SoC tree, the rest I will handle. > Hi Linus, Andrew, Per the comment in the following mail https://lkml.org/lkml/2021/6/9/317 I was wondering if I should prepare v6 for the currnet solution or I should drop this patch series then prepare another patch for the new solution(piar GPIO input/output) which breaks userspace but is better than the current solution. Thanks, Steven > Yours, > Linus Walleij _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel