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From: Nishanth Menon <nm@ti.com>
To: Suman Anna <s-anna@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>, <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 4/4] arm64: dts: ti: k3-am642-evm/sk: Reserve some on-chip SRAM for R5Fs
Date: Fri, 11 Jun 2021 14:13:53 -0500	[thread overview]
Message-ID: <20210611191353.qn5lgasho2rujyof@situated> (raw)
In-Reply-To: <20210528144718.25132-5-s-anna@ti.com>

On 09:47-20210528, Suman Anna wrote:
> Reserve some portions of the MAIN domain on-chip SRAM for use by various
> R5F cores on AM642 EVM and SK boards. A bank (256 KB) each is reserved
> from the on-chip SRAM for each R5F core. This is done through specific
> child SRAM nodes in the board dts file.
> 
> The memory regions are also assigned to each R5F remoteproc node using
> the sram property. The reserved SRAM banks are as follows for each core:
>   Main R5FSS0 Core0 : OCSRAM1
>   Main R5FSS0 Core1 : OCSRAM2
>   Main R5FSS1 Core0 : OCSRAM3
>   Main R5FSS1 Core1 : OCSRAM4
> 
> Signed-off-by: Suman Anna <s-anna@ti.com>
> Signed-off-by: Ming Wei <mwei@ti.com>
> Signed-off-by: Nishanth Menon <nm@ti.com>
> Link: https://lore.kernel.org/r/20210528144718.25132-5-s-anna@ti.com
> ---
>  arch/arm64/boot/dts/ti/k3-am642-evm.dts | 22 ++++++++++++++++++++++
>  arch/arm64/boot/dts/ti/k3-am642-sk.dts  | 22 ++++++++++++++++++++++
>  2 files changed, 44 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
> index 4d0b3f86525e..083df636d7ff 100644
> --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
> @@ -184,28 +184,50 @@ cpsw3g_phy3: ethernet-phy@3 {
>  	};
>  };
>  
> +&oc_sram {
> +	main_r5fss0_core0_sram: r5f-sram@40000 {
> +		reg = <0x40000 0x40000>;
> +	};
> +
> +	main_r5fss0_core1_sram: r5f-sram@80000 {
> +		reg = <0x80000 0x40000>;
> +	};
> +
> +	main_r5fss1_core0_sram: r5f-sram@c0000 {
> +		reg = <0xc0000 0x40000>;
> +	};
> +
> +	main_r5fss1_core1_sram: r5f-sram@100000 {
> +		reg = <0x100000 0x40000>;
> +	};
> +};

We need to relook at these addresses -> please see the series from
Vignesh[1] and Ashwath[2].

0x0 <-> 0x1a0000 is free
0x1a0000 <-> 0x1bc000 -> TF-A
0x1bc000 <-> 0x1c0000 -> Free
0x1c0000 <-> 0x200000 -> Seems to be sysfw?


[1] https://lore.kernel.org/linux-devicetree/20210609140604.9490-1-vigneshr@ti.com/
[2] https://lore.kernel.org/linux-devicetree/162343800075.7434.10921347563461214925.b4-ty@ti.com/

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D

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  parent reply	other threads:[~2021-06-11 20:24 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-28 14:47 [PATCH 0/4] Add R5F nodes on TI K3 AM64x SoCs Suman Anna
2021-05-28 14:47 ` [PATCH 1/4] arm64: dts: ti: k3-am64-main: Add MAIN domain R5F cluster nodes Suman Anna
2021-05-28 14:47 ` [PATCH 2/4] arm64: dts: ti: k3-am642-evm/sk: Add mailboxes to R5Fs Suman Anna
2021-05-28 14:47 ` [PATCH 3/4] arm64: dts: ti: k3-am642-evm/sk: Add DDR carveout memory nodes for R5Fs Suman Anna
2021-05-28 14:47 ` [PATCH 4/4] arm64: dts: ti: k3-am642-evm/sk: Reserve some on-chip SRAM " Suman Anna
2021-06-09 14:01   ` Vignesh Raghavendra
2021-06-11 19:13   ` Nishanth Menon [this message]
2021-06-14 18:05     ` Suman Anna
2021-06-15 19:42       ` Nishanth Menon

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