From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA845C2B9F4 for ; Mon, 14 Jun 2021 18:05:58 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6ABDF610A3 for ; Mon, 14 Jun 2021 18:05:58 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6ABDF610A3 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=WZd+MKx+PuIYs52ID4+XqD5DpwR2AVFpQCqbIbBm1wM=; b=yasARb4Vc/6MWY tCCDf2GCR9a8YxabzXq6g1g7qxgBi1jfp/PIDpzAfq28FfiQtn5X7BJkqQRfgC1lLrxXuSVOBoxTD yyX6q8kpxYF3SUPz5YOSVYHsJpqRkwTu8X3W4uUlezq8uulUp8aI2mUv9pjG3fJAriD5TUc2dI8WS poNchU8/T3SJvqVVa0b9qxuaXrE7I3/CigVpPEYBpdB8qJmbn4PHKd+OQkzwDZrelmCJ03D7cZbAM 02kXQ1It96CSI6HWx6qsA01RVuMqfvOG6LJiAeQOJmM4Ns3JjIog9rELNVE4KDAJYjmuqhQklDJo9 HKzp/klV9dbV8tFJ0Aog==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1lsqwX-00Fb3d-8T; Mon, 14 Jun 2021 18:04:13 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1lsquX-00FaH9-0c for linux-arm-kernel@lists.infradead.org; Mon, 14 Jun 2021 18:02:10 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id 86E00610A3; Mon, 14 Jun 2021 18:02:07 +0000 (UTC) Date: Mon, 14 Jun 2021 19:02:05 +0100 From: Catalin Marinas To: Peter Collingbourne Cc: Vincenzo Frascino , Will Deacon , Evgenii Stepanov , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v3] arm64: mte: allow async MTE to be upgraded to sync on a per-CPU basis Message-ID: <20210614180204.GJ30667@arm.com> References: <20210611215101.1060663-1-pcc@google.com> <20210614175609.GI30667@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210614175609.GI30667@arm.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210614_110209_128501_EA001793 X-CRM114-Status: GOOD ( 22.05 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Jun 14, 2021 at 06:56:09PM +0100, Catalin Marinas wrote: > On Fri, Jun 11, 2021 at 02:51:01PM -0700, Peter Collingbourne wrote: > > diff --git a/Documentation/arm64/memory-tagging-extension.rst b/Documentation/arm64/memory-tagging-extension.rst > > index b540178a93f8..2fc145de6530 100644 > > --- a/Documentation/arm64/memory-tagging-extension.rst > > +++ b/Documentation/arm64/memory-tagging-extension.rst > > @@ -120,6 +120,25 @@ in the ``PR_MTE_TAG_MASK`` bit-field. > > interface provides an include mask. An include mask of ``0`` (exclusion > > mask ``0xffff``) results in the CPU always generating tag ``0``. > > > > +Upgrading to stricter tag checking modes > > +---------------------------------------- > > + > > +On some CPUs the performance of MTE in stricter tag checking modes > > +is the same as that of less strict tag checking modes. This makes it > > +worthwhile to enable stricter checks on those CPUs when a less strict > > +checking mode is requested, in order to gain the error detection > > +benefits of the stricter checks without the performance downsides. To > > +opt into upgrading to a stricter checking mode on those CPUs, the user > > +can set the ``PR_MTE_DYNAMIC_TCF`` flag bit in the ``flags`` argument > > +to the ``prctl(PR_SET_TAGGED_ADDR_CTRL, flags, 0, 0, 0)`` system call. > > + > > +This feature is currently only supported for upgrading from > > +asynchronous mode. To configure a CPU to upgrade from asynchronous mode > > +to synchronous mode, a privileged user may write the value ``1`` to > > +``/sys/devices/system/cpu/cpu/mte_upgrade_async``, and to disable > > +upgrading they may write the value ``2``. By default the feature is > > +disabled on all CPUs. > > Why not 0 to disable? This should be the default. I'd keep 2 for > upgrading to the new asymmetric mode in v8.7 (reads sync, writes async). Ah, I think I get it, you wanted to use the TCF values. Fine by me but I'd actually still keep 0 for disable (which is the default value I guess) with the 1 (or 3 later) for the upgrade. We may also add an mte_upgrade_asym file at some point. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel