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Tue, 15 Jun 2021 11:12:49 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8EB8661459; Tue, 15 Jun 2021 11:12:45 +0000 (UTC) Received: from [185.219.108.64] (helo=why.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1lt6zr-007fRJ-Aj; Tue, 15 Jun 2021 12:12:43 +0100 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org Cc: Lorenzo Pieralisi , Will Deacon , Catalin Marinas , Mark Rutland , Valentin Schneider , Alexandru Elisei , Sudeep Holla , Russell King , kernel-team@android.com Subject: [PATCH v2 0/4] arm64: Fix cpuidle/suspend with pseudo-NMI enabled Date: Tue, 15 Jun 2021 12:12:23 +0100 Message-Id: <20210615111227.2454465-1-maz@kernel.org> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, lorenzo.pieralisi@arm.com, will@kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com, valentin.schneider@arm.com, alexandru.elisei@arm.com, sudeep.holla@arm.com, linux@armlinux.org.uk, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210615_121247_367775_E6CE2675 X-CRM114-Status: GOOD ( 11.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This is a follow-up on the series posted at [1], with some added fixes. The main difference is the covering of system suspend, although it is untested (the GICv3 boxes I have don't support system suspend...). Tested on an Ampere Altra system. * From v1: - Moved the wrapping of cpu_suspend() into the body of the function, now covering system suspend as well - Added RBs, TBs. [1] https://lore.kernel.org/r/20210608172715.2396787-1-maz@kernel.org Marc Zyngier (4): arm64: Add cpuidle context save/restore helpers arm64: Convert cpu_do_idle() to using cpuidle context helpers PSCI: Use cpuidle context helpers in psci_cpu_suspend_enter() arm64: suspend: Use cpuidle context helpers in cpu_suspend() arch/arm/include/asm/cpuidle.h | 5 ++++ arch/arm64/include/asm/cpuidle.h | 35 +++++++++++++++++++++++++++ arch/arm64/kernel/process.c | 41 +++++++------------------------- arch/arm64/kernel/suspend.c | 12 +++++++++- drivers/firmware/psci/psci.c | 9 +++++-- 5 files changed, 67 insertions(+), 35 deletions(-) -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel