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Tue, 15 Jun 2021 14:42:07 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Tue, 15 Jun 2021 14:42:07 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 15FJg7Fn054716; Tue, 15 Jun 2021 14:42:07 -0500 Date: Tue, 15 Jun 2021 14:42:07 -0500 From: Nishanth Menon To: Suman Anna CC: Lokesh Vutla , , Subject: Re: [PATCH 4/4] arm64: dts: ti: k3-am642-evm/sk: Reserve some on-chip SRAM for R5Fs Message-ID: <20210615194207.ww3ed7hmibfw6tnd@swiftness> References: <20210528144718.25132-1-s-anna@ti.com> <20210528144718.25132-5-s-anna@ti.com> <20210611191353.qn5lgasho2rujyof@situated> <209c545d-c012-9ee8-34ca-bc4f48dbfbcb@ti.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <209c545d-c012-9ee8-34ca-bc4f48dbfbcb@ti.com> User-Agent: NeoMutt/20171215 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210615_124210_669233_662137FE X-CRM114-Status: GOOD ( 12.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 13:05-20210614, Suman Anna wrote: > >> +&oc_sram { > >> + main_r5fss0_core0_sram: r5f-sram@40000 { > >> + reg = <0x40000 0x40000>; > >> + }; > >> + > >> + main_r5fss0_core1_sram: r5f-sram@80000 { > >> + reg = <0x80000 0x40000>; > >> + }; > >> + > >> + main_r5fss1_core0_sram: r5f-sram@c0000 { > >> + reg = <0xc0000 0x40000>; > >> + }; > >> + > >> + main_r5fss1_core1_sram: r5f-sram@100000 { > >> + reg = <0x100000 0x40000>; > >> + }; > >> +}; > > > > These addresses are currently in sync with the corresponding firmware linker map > files. Any changes needed here should also be aligned and updated with all the > firmwares then. > > Nishanth, > How about dropping this patch until we conclude the discussion and picking up > the rest? Lets skip this patch for this merge cycle - aka stay compatible with the previous reference binaries that do not use OCSRAM (aka not pick up 4x latency improvement), till we figure out a future looking and relatively stable memory map that considers: a) R5s IPC RAM + future usage: b) M4F IPC RAM c) ICSSG buffer RAMs -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel