From: Will Deacon <will@kernel.org>
To: Peter Collingbourne <pcc@google.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Vincenzo Frascino <vincenzo.frascino@arm.com>,
Evgenii Stepanov <eugenis@google.com>,
Szabolcs Nagy <szabolcs.nagy@arm.com>,
Tejas Belagod <Tejas.Belagod@arm.com>,
linux-arm-kernel@lists.infradead.org,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Subject: Re: [PATCH v9 2/4] arm64: mte: change ASYNC and SYNC TCF settings into bitfields
Date: Wed, 7 Jul 2021 12:10:54 +0100 [thread overview]
Message-ID: <20210707111054.GA21926@willie-the-truck> (raw)
In-Reply-To: <20210702194110.2045282-3-pcc@google.com>
On Fri, Jul 02, 2021 at 12:41:08PM -0700, Peter Collingbourne wrote:
> Allow the user program to specify both ASYNC and SYNC TCF modes by
> repurposing the existing constants as bitfields. This will allow the
> kernel to select one of the modes on behalf of the user program. With
> this patch the kernel will always select async mode, but a subsequent
> patch will make this configurable.
>
> Link: https://linux-review.googlesource.com/id/Icc5923c85a8ea284588cc399ae74fd19ec291230
> Signed-off-by: Peter Collingbourne <pcc@google.com>
> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
> ---
> v9:
> - make mte_update_sctlr_user static
>
> arch/arm64/include/asm/processor.h | 3 ++
> arch/arm64/kernel/mte.c | 70 ++++++++++++------------------
> include/uapi/linux/prctl.h | 11 ++---
> 3 files changed, 37 insertions(+), 47 deletions(-)
...
> long set_mte_ctrl(struct task_struct *task, unsigned long arg)
> {
> - u64 sctlr = task->thread.sctlr_user & ~SCTLR_EL1_TCF0_MASK;
> u64 mte_ctrl = (~((arg & PR_MTE_TAG_MASK) >> PR_MTE_TAG_SHIFT) &
> SYS_GCR_EL1_EXCL_MASK) << MTE_CTRL_GCR_USER_EXCL_SHIFT;
>
> if (!system_supports_mte())
> return 0;
>
> - switch (arg & PR_MTE_TCF_MASK) {
> - case PR_MTE_TCF_NONE:
> - sctlr |= SCTLR_EL1_TCF0_NONE;
> - break;
> - case PR_MTE_TCF_SYNC:
> - sctlr |= SCTLR_EL1_TCF0_SYNC;
> - break;
> - case PR_MTE_TCF_ASYNC:
> - sctlr |= SCTLR_EL1_TCF0_ASYNC;
> - break;
> - default:
> - return -EINVAL;
> - }
> + if (arg & PR_MTE_TCF_ASYNC)
> + mte_ctrl |= MTE_CTRL_TCF_ASYNC;
> + if (arg & PR_MTE_TCF_SYNC)
> + mte_ctrl |= MTE_CTRL_TCF_SYNC;
>
> - if (task != current) {
> - task->thread.sctlr_user = sctlr;
> - task->thread.mte_ctrl = mte_ctrl;
> - } else {
> - set_task_sctlr_el1(sctlr);
> - set_gcr_el1_excl(mte_ctrl);
> + task->thread.mte_ctrl = mte_ctrl;
> + if (task == current) {
> + mte_update_sctlr_user(task);
In conjunction with the next patch, what happens if we migrate at this
point? I worry that we can install a stale sctlr_user value.
> + set_task_sctlr_el1(task->thread.sctlr_user);
Will
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next prev parent reply other threads:[~2021-07-07 11:12 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-02 19:41 [PATCH v9 0/4] arm64: mte: allow async MTE to be upgraded to sync on a per-CPU basis Peter Collingbourne
2021-07-02 19:41 ` [PATCH v9 1/4] arm64: mte: rename gcr_user_excl to mte_ctrl Peter Collingbourne
2021-07-13 17:50 ` Will Deacon
2021-07-02 19:41 ` [PATCH v9 2/4] arm64: mte: change ASYNC and SYNC TCF settings into bitfields Peter Collingbourne
2021-07-07 11:10 ` Will Deacon [this message]
2021-07-12 19:04 ` Peter Collingbourne
2021-07-13 17:27 ` Will Deacon
2021-07-13 22:52 ` Peter Collingbourne
2021-07-02 19:41 ` [PATCH v9 3/4] arm64: mte: introduce a per-CPU tag checking mode preference Peter Collingbourne
2021-07-07 11:15 ` Will Deacon
2021-07-12 18:59 ` Peter Collingbourne
2021-07-13 17:48 ` Will Deacon
2021-07-13 22:46 ` Peter Collingbourne
2021-07-02 19:41 ` [PATCH v9 4/4] Documentation: document the preferred tag checking mode feature Peter Collingbourne
2021-07-13 17:53 ` Will Deacon
2021-07-13 22:55 ` Peter Collingbourne
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