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Wed, 14 Jul 2021 12:24:49 -0700 (PDT) Received: from robh.at.kernel.org ([64.188.179.248]) by smtp.gmail.com with ESMTPSA id r1sm1281833ilt.37.2021.07.14.12.24.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Jul 2021 12:24:48 -0700 (PDT) Received: (nullmailer pid 3065460 invoked by uid 1000); Wed, 14 Jul 2021 19:24:47 -0000 Date: Wed, 14 Jul 2021 13:24:47 -0600 From: Rob Herring To: Nobuhiro Iwamatsu Cc: Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, punit1.agrawal@toshiba.co.jp, yuji2.ishikawa@toshiba.co.jp, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 3/4] dt-bindings: clock: Add DT bindings for SMU of Toshiba Visconti TMPV770x SoC Message-ID: <20210714192447.GA3059664@robh.at.kernel.org> References: <20210624034337.282386-1-nobuhiro1.iwamatsu@toshiba.co.jp> <20210624034337.282386-4-nobuhiro1.iwamatsu@toshiba.co.jp> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210624034337.282386-4-nobuhiro1.iwamatsu@toshiba.co.jp> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210714_122453_141564_76CE3B5B X-CRM114-Status: GOOD ( 19.25 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Jun 24, 2021 at 12:43:36PM +0900, Nobuhiro Iwamatsu wrote: > Add device tree bindings for SMU (System Management Unit) controller of > Toshiba Visconti TMPV770x SoC series. > > Signed-off-by: Nobuhiro Iwamatsu > --- > .../clock/toshiba,tmpv770x-pismu.yaml | 50 +++++++++++++++++++ > 1 file changed, 50 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pismu.yaml > > diff --git a/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pismu.yaml b/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pismu.yaml > new file mode 100644 > index 000000000000..18fdf4f2831b > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pismu.yaml > @@ -0,0 +1,50 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/toshiba,tmpv770x-pismu.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Toshiba Visconti5 TMPV770x SMU controller Device Tree Bindings > + > +maintainers: > + - Nobuhiro Iwamatsu > + > +description: > + Toshia Visconti5 SMU (System Management Unit) which supports the clock > + and resets on TMPV770x. > + > +properties: > + compatible: > + const: toshiba,tmpv7708-pismu > + > + reg: > + maxItems: 1 > + > + '#clock-cells': > + const: 1 > + > + '#reset-cells': > + const: 1 Is there a connection to the PLLs? What are the clock inputs? > + > +required: > + - compatible > + - reg > + - "#clock-cells" > + - "#reset-cells" > + > +additionalProperties: false > + > +examples: > + - | > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + pismu: pismu@24200000 { clock-controller@... > + compatible = "toshiba,tmpv7708-pismu"; > + reg = <0 0x24200000 0 0x2140>; > + #clock-cells = <1>; > + #reset-cells = <1>; > + }; > + }; > +... > -- > 2.32.0 > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel