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From: Fabio Estevam <festevam@gmail.com>
To: shawnguo@kernel.org
Cc: linux-arm-kernel@lists.infradead.org, o.rempel@pengutronix.de,
	Markus.Niebel@tq-group.com, Fabio Estevam <festevam@gmail.com>
Subject: [PATCH 2/4] ARM: dts: imx6qp-prtwd3: Fix the SPI chipselect polarity
Date: Fri, 16 Jul 2021 10:36:57 -0300	[thread overview]
Message-ID: <20210716133659.3372047-2-festevam@gmail.com> (raw)
In-Reply-To: <20210716133659.3372047-1-festevam@gmail.com>

The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd for example:
    
[    4.854337] m25p80@0 enforce active low on chipselect handle
   
Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.
    
The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:
    
* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.
    
To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.

The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd for example:
    
[    4.854337] m25p80@0 enforce active low on chipselect handle
   
Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.
    
The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:
    
* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.
    
To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
---
 arch/arm/boot/dts/imx6qp-prtwd3.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/imx6qp-prtwd3.dts b/arch/arm/boot/dts/imx6qp-prtwd3.dts
index c42723989bc0..1a334918f9ca 100644
--- a/arch/arm/boot/dts/imx6qp-prtwd3.dts
+++ b/arch/arm/boot/dts/imx6qp-prtwd3.dts
@@ -123,7 +123,7 @@ &can1 {
 };
 
 &ecspi2 {
-	cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
+	cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_ecspi2>;
 	status = "okay";
@@ -189,7 +189,7 @@ fixed-link {
 };
 
 &ecspi3 {
-	cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
+	cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_ecspi3>;
 	status = "okay";
-- 
2.25.1


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  reply	other threads:[~2021-07-16 13:39 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-16 13:36 [PATCH 1/4] ARM: dts: imx6dl-alti6p: Fix the SPI chipselect polarity Fabio Estevam
2021-07-16 13:36 ` Fabio Estevam [this message]
2021-07-17  4:58   ` [PATCH 2/4] ARM: dts: imx6qp-prtwd3: " Oleksij Rempel
2021-09-22  3:02   ` Shawn Guo
2021-07-16 13:36 ` [PATCH 3/4] ARM: dts: imx6qdl-tqma6: " Fabio Estevam
2021-07-16 13:36 ` [PATCH 4/4] ARM: dts: imx7d-sdb: " Fabio Estevam
2021-07-17  4:57 ` [PATCH 1/4] ARM: dts: imx6dl-alti6p: " Oleksij Rempel
2021-08-14 13:27   ` Fabio Estevam
2021-09-22  1:23     ` Shawn Guo
2021-09-22  1:28       ` Fabio Estevam
2021-09-22  2:03         ` Shawn Guo
2021-09-22  2:04           ` Fabio Estevam
2021-09-22  3:04 ` Shawn Guo

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