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From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org,
	kvmarm@lists.cs.columbia.edu
Cc: James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Alexandre Chartre <alexandre.chartre@oracle.com>,
	Robin Murphy <robin.murphy@arm.com>,
	Andrew Jones <drjones@redhat.com>,
	Russell King <linux@arm.linux.org.uk>,
	kernel-team@android.com
Subject: [PATCH v2 4/4] KVM: arm64: Remove PMSWINC_EL0 shadow register
Date: Mon, 19 Jul 2021 13:39:02 +0100	[thread overview]
Message-ID: <20210719123902.1493805-5-maz@kernel.org> (raw)
In-Reply-To: <20210719123902.1493805-1-maz@kernel.org>

We keep an entry for the PMSWINC_EL0 register in the vcpu structure,
while *never* writing anything there outside of reset.

Given that the register is defined as write-only, that we always
trap when this register is accessed, there is little point in saving
anything anyway.

Get rid of the entry, and save a mighty 8 bytes per vcpu structure.

We still need to keep it exposed to userspace in order to preserve
backward compatibility with previously saved VMs. Since userspace
cannot expect any effect of writing to PMSWINC_EL0, treat the
register as RAZ/WI for the purpose of userspace access.

Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 arch/arm64/include/asm/kvm_host.h |  1 -
 arch/arm64/kvm/sys_regs.c         | 21 ++++++++++++++++++++-
 2 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index 41911585ae0c..afc169630884 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -185,7 +185,6 @@ enum vcpu_sysreg {
 	PMCNTENSET_EL0,	/* Count Enable Set Register */
 	PMINTENSET_EL1,	/* Interrupt Enable Set Register */
 	PMOVSSET_EL0,	/* Overflow Flag Status Set Register */
-	PMSWINC_EL0,	/* Software Increment Register */
 	PMUSERENR_EL0,	/* User Enable Register */
 
 	/* Pointer Authentication Registers in a strict increasing order. */
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index f22139658e48..a1f5101f49a3 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -1286,6 +1286,20 @@ static int set_raz_id_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
 	return __set_id_reg(vcpu, rd, uaddr, true);
 }
 
+static int set_wi_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
+		      const struct kvm_one_reg *reg, void __user *uaddr)
+{
+	int err;
+	u64 val;
+
+	/* Perform the access even if we are going to ignore the value */
+	err = reg_from_user(&val, uaddr, sys_reg_to_index(rd));
+	if (err)
+		return err;
+
+	return 0;
+}
+
 static bool access_ctr(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
 		       const struct sys_reg_desc *r)
 {
@@ -1629,8 +1643,13 @@ static const struct sys_reg_desc sys_reg_descs[] = {
 	  .access = access_pmcnten, .reg = PMCNTENSET_EL0 },
 	{ PMU_SYS_REG(SYS_PMOVSCLR_EL0),
 	  .access = access_pmovs, .reg = PMOVSSET_EL0 },
+	/*
+	 * PM_SWINC_EL0 is exposed to userspace as RAZ/WI, as it was
+	 * previously (and pointlessly) advertised in the past...
+	 */
 	{ PMU_SYS_REG(SYS_PMSWINC_EL0),
-	  .access = access_pmswinc, .reg = PMSWINC_EL0 },
+	  .get_user = get_raz_id_reg, .set_user = set_wi_reg,
+	  .access = access_pmswinc, .reset = NULL },
 	{ PMU_SYS_REG(SYS_PMSELR_EL0),
 	  .access = access_pmselr, .reset = reset_pmselr, .reg = PMSELR_EL0 },
 	{ PMU_SYS_REG(SYS_PMCEID0_EL0),
-- 
2.30.2


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  parent reply	other threads:[~2021-07-19 12:42 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-19 12:38 [PATCH v2 0/4] kvm-arm64: Fix PMU reset values (and more) Marc Zyngier
2021-07-19 12:38 ` [PATCH v2 1/4] KVM: arm64: Narrow PMU sysreg reset values to architectural requirements Marc Zyngier
2021-07-19 15:55   ` Alexandru Elisei
2021-07-19 15:56     ` Marc Zyngier
2021-07-19 16:02       ` Alexandru Elisei
2021-07-19 12:39 ` [PATCH v2 2/4] KVM: arm64: Drop unnecessary masking of PMU registers Marc Zyngier
2021-07-19 12:39 ` [PATCH v2 3/4] KVM: arm64: Disabling disabled PMU counters wastes a lot of time Marc Zyngier
2021-07-19 12:39 ` Marc Zyngier [this message]
2021-07-19 16:35   ` [PATCH v2 4/4] KVM: arm64: Remove PMSWINC_EL0 shadow register Alexandru Elisei
2021-07-19 16:56     ` Marc Zyngier
2021-07-20 16:44       ` Alexandru Elisei
2021-07-21  9:30         ` Marc Zyngier
2021-08-02 13:39 ` [PATCH v2 0/4] kvm-arm64: Fix PMU reset values (and more) Marc Zyngier

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