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From: Fuad Tabba <tabba@google.com>
To: kvmarm@lists.cs.columbia.edu
Cc: maz@kernel.org, will@kernel.org, james.morse@arm.com,
	 alexandru.elisei@arm.com, suzuki.poulose@arm.com,
	mark.rutland@arm.com,  christoffer.dall@arm.com,
	pbonzini@redhat.com, drjones@redhat.com,  qperret@google.com,
	kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	 kernel-team@android.com, tabba@google.com
Subject: [PATCH v3 13/15] KVM: arm64: Trap access to pVM restricted features
Date: Mon, 19 Jul 2021 17:03:44 +0100	[thread overview]
Message-ID: <20210719160346.609914-14-tabba@google.com> (raw)
In-Reply-To: <20210719160346.609914-1-tabba@google.com>

Trap accesses to restricted features for VMs running in protected
mode.

Access to feature registers are emulated, and only supported
features are exposed to protected VMs.

Accesses to restricted registers as well as restricted
instructions are trapped, and an undefined exception is injected
into the protected guests, i.e., with EC = 0x0 (unknown reason).
This EC is the one used, according to the Arm Architecture
Reference Manual, for unallocated or undefined system registers
or instructions.

Only affects the functionality of protected VMs. Otherwise,
should not affect non-protected VMs when KVM is running in
protected mode.

Signed-off-by: Fuad Tabba <tabba@google.com>
---
 arch/arm64/kvm/hyp/include/hyp/switch.h |  3 ++
 arch/arm64/kvm/hyp/nvhe/switch.c        | 52 ++++++++++++++++++-------
 2 files changed, 41 insertions(+), 14 deletions(-)

diff --git a/arch/arm64/kvm/hyp/include/hyp/switch.h b/arch/arm64/kvm/hyp/include/hyp/switch.h
index 5a2b89b96c67..8431f1514280 100644
--- a/arch/arm64/kvm/hyp/include/hyp/switch.h
+++ b/arch/arm64/kvm/hyp/include/hyp/switch.h
@@ -33,6 +33,9 @@
 extern struct exception_table_entry __start___kvm_ex_table;
 extern struct exception_table_entry __stop___kvm_ex_table;
 
+int kvm_handle_pvm_sys64(struct kvm_vcpu *vcpu);
+int kvm_handle_pvm_restricted(struct kvm_vcpu *vcpu);
+
 /* Check whether the FP regs were dirtied while in the host-side run loop: */
 static inline bool update_fp_enabled(struct kvm_vcpu *vcpu)
 {
diff --git a/arch/arm64/kvm/hyp/nvhe/switch.c b/arch/arm64/kvm/hyp/nvhe/switch.c
index 36da423006bd..99bbbba90094 100644
--- a/arch/arm64/kvm/hyp/nvhe/switch.c
+++ b/arch/arm64/kvm/hyp/nvhe/switch.c
@@ -158,30 +158,54 @@ static void __pmu_switch_to_host(struct kvm_cpu_context *host_ctxt)
 		write_sysreg(pmu->events_host, pmcntenset_el0);
 }
 
+/**
+ * Handle system register accesses for protected VMs.
+ *
+ * Return 1 if handled, or 0 if not.
+ */
+static int handle_pvm_sys64(struct kvm_vcpu *vcpu)
+{
+	return kvm_vm_is_protected(kern_hyp_va(vcpu->kvm)) ?
+			     kvm_handle_pvm_sys64(vcpu) :
+			     0;
+}
+
+/**
+ * Handle restricted feature accesses for protected VMs.
+ *
+ * Return 1 if handled, or 0 if not.
+ */
+static int handle_pvm_restricted(struct kvm_vcpu *vcpu)
+{
+	return kvm_vm_is_protected(kern_hyp_va(vcpu->kvm)) ?
+			     kvm_handle_pvm_restricted(vcpu) :
+			     0;
+}
+
 typedef int (*exit_handle_fn)(struct kvm_vcpu *);
 
 static exit_handle_fn hyp_exit_handlers[] = {
-	[0 ... ESR_ELx_EC_MAX]		= NULL,
+	[0 ... ESR_ELx_EC_MAX]		= handle_pvm_restricted,
 	[ESR_ELx_EC_WFx]		= NULL,
-	[ESR_ELx_EC_CP15_32]		= NULL,
-	[ESR_ELx_EC_CP15_64]		= NULL,
-	[ESR_ELx_EC_CP14_MR]		= NULL,
-	[ESR_ELx_EC_CP14_LS]		= NULL,
-	[ESR_ELx_EC_CP14_64]		= NULL,
+	[ESR_ELx_EC_CP15_32]		= handle_pvm_restricted,
+	[ESR_ELx_EC_CP15_64]		= handle_pvm_restricted,
+	[ESR_ELx_EC_CP14_MR]		= handle_pvm_restricted,
+	[ESR_ELx_EC_CP14_LS]		= handle_pvm_restricted,
+	[ESR_ELx_EC_CP14_64]		= handle_pvm_restricted,
 	[ESR_ELx_EC_HVC32]		= NULL,
 	[ESR_ELx_EC_SMC32]		= NULL,
 	[ESR_ELx_EC_HVC64]		= NULL,
 	[ESR_ELx_EC_SMC64]		= NULL,
-	[ESR_ELx_EC_SYS64]		= NULL,
-	[ESR_ELx_EC_SVE]		= NULL,
+	[ESR_ELx_EC_SYS64]		= handle_pvm_sys64,
+	[ESR_ELx_EC_SVE]		= handle_pvm_restricted,
 	[ESR_ELx_EC_IABT_LOW]		= NULL,
 	[ESR_ELx_EC_DABT_LOW]		= NULL,
-	[ESR_ELx_EC_SOFTSTP_LOW]	= NULL,
-	[ESR_ELx_EC_WATCHPT_LOW]	= NULL,
-	[ESR_ELx_EC_BREAKPT_LOW]	= NULL,
-	[ESR_ELx_EC_BKPT32]		= NULL,
-	[ESR_ELx_EC_BRK64]		= NULL,
-	[ESR_ELx_EC_FP_ASIMD]		= NULL,
+	[ESR_ELx_EC_SOFTSTP_LOW]	= handle_pvm_restricted,
+	[ESR_ELx_EC_WATCHPT_LOW]	= handle_pvm_restricted,
+	[ESR_ELx_EC_BREAKPT_LOW]	= handle_pvm_restricted,
+	[ESR_ELx_EC_BKPT32]		= handle_pvm_restricted,
+	[ESR_ELx_EC_BRK64]		= handle_pvm_restricted,
+	[ESR_ELx_EC_FP_ASIMD]		= handle_pvm_restricted,
 	[ESR_ELx_EC_PAC]		= NULL,
 };
 
-- 
2.32.0.402.g57bb445576-goog


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  parent reply	other threads:[~2021-07-19 16:18 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-19 16:03 [PATCH v3 00/15] KVM: arm64: Fixed features for protected VMs Fuad Tabba
2021-07-19 16:03 ` [PATCH v3 01/15] KVM: arm64: placeholder to check if VM is protected Fuad Tabba
2021-08-12  8:58   ` Will Deacon
2021-08-12  9:22     ` Fuad Tabba
2021-07-19 16:03 ` [PATCH v3 02/15] KVM: arm64: Remove trailing whitespace in comment Fuad Tabba
2021-08-12  8:59   ` Will Deacon
2021-07-19 16:03 ` [PATCH v3 03/15] KVM: arm64: MDCR_EL2 is a 64-bit register Fuad Tabba
2021-07-19 16:03 ` [PATCH v3 04/15] KVM: arm64: Fix names of config register fields Fuad Tabba
2021-07-19 16:03 ` [PATCH v3 05/15] KVM: arm64: Refactor sys_regs.h,c for nVHE reuse Fuad Tabba
2021-07-20 13:38   ` [PATCH v3 05/15] KVM: arm64: Refactor sys_regs.h, c " Andrew Jones
2021-07-20 14:03     ` Fuad Tabba
2021-08-12  8:59   ` Will Deacon
2021-07-19 16:03 ` [PATCH v3 06/15] KVM: arm64: Restore mdcr_el2 from vcpu Fuad Tabba
2021-07-20 14:52   ` Andrew Jones
2021-07-21  7:37     ` Fuad Tabba
2021-08-12  8:46       ` Will Deacon
2021-08-12  9:28         ` Fuad Tabba
2021-08-12  9:49           ` Will Deacon
2021-07-19 16:03 ` [PATCH v3 07/15] KVM: arm64: Track value of cptr_el2 in struct kvm_vcpu_arch Fuad Tabba
2021-08-12  8:59   ` Will Deacon
2021-07-19 16:03 ` [PATCH v3 08/15] KVM: arm64: Add feature register flag definitions Fuad Tabba
2021-08-12  8:59   ` Will Deacon
2021-08-12  9:21     ` Fuad Tabba
2021-07-19 16:03 ` [PATCH v3 09/15] KVM: arm64: Add config register bit definitions Fuad Tabba
2021-08-12  8:59   ` Will Deacon
2021-07-19 16:03 ` [PATCH v3 10/15] KVM: arm64: Guest exit handlers for nVHE hyp Fuad Tabba
2021-08-03 15:32   ` Will Deacon
2021-07-19 16:03 ` [PATCH v3 11/15] KVM: arm64: Add trap handlers for protected VMs Fuad Tabba
2021-08-12  9:45   ` Will Deacon
2021-08-16 14:39     ` Fuad Tabba
2021-07-19 16:03 ` [PATCH v3 12/15] KVM: arm64: Move sanitized copies of CPU features Fuad Tabba
2021-08-12  9:46   ` Will Deacon
2021-07-19 16:03 ` Fuad Tabba [this message]
2021-08-12  9:53   ` [PATCH v3 13/15] KVM: arm64: Trap access to pVM restricted features Will Deacon
2021-07-19 16:03 ` [PATCH v3 14/15] KVM: arm64: Handle protected guests at 32 bits Fuad Tabba
2021-07-19 19:43   ` Oliver Upton
2021-07-21  8:39     ` Fuad Tabba
2021-08-12  9:57   ` Will Deacon
2021-08-12 13:08     ` Fuad Tabba
2021-07-19 16:03 ` [PATCH v3 15/15] KVM: arm64: Restrict protected VM capabilities Fuad Tabba
2021-08-12  9:59   ` Will Deacon
2021-08-16 14:40     ` Fuad Tabba

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