[PATCH 41/54] ARM: dts: sunxi: Fix OPP arrays

Maxime Ripard
2021-07-21T14:51:29Z

Even though it translates to the same thing down to the binary level, we
should have an array of 2 number cells to describe each OPP, which in
turns create a validation warning.

Let's fix this.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
.../arm/boot/dts/sun4i-a10-olinuxino-lime.dts | 11 +++--
arch/arm/boot/dts/sun4i-a10.dtsi | 11 +++--
arch/arm/boot/dts/sun5i-a13.dtsi | 15 +++----
arch/arm/boot/dts/sun6i-a31.dtsi | 44 +++++++++----------
arch/arm/boot/dts/sun7i-a20-bananapi.dts | 17 ++++---
arch/arm/boot/dts/sun7i-a20.dtsi | 34 +++++++-------
6 files changed, 61 insertions(+), 71 deletions(-)

diff --git a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts
index ad0e25af45be..83d283cf6633 100644
--- a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts
+++ b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts
@@ -91,12 +91,11 @@ &cpu0 {
/*
* The A10-Lime is known to be unstable when running at 1008 MHz
*/
- operating-points = <
- /* kHz uV */
- 912000 1350000
- 864000 1300000
- 624000 1250000
- >;
+ operating-points =
+ /* kHz uV */
+ <912000 1350000>,
+ <864000 1300000>,
+ <624000 1250000>;
};

&de {
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 1c5a666c54b5..51a6464aab9a 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -115,13 +115,12 @@ cpu0: cpu@0 {
reg = <0x0>;
clocks = <&ccu CLK_CPU>;
clock-latency = <244144>; /* 8 32k periods */
- operating-points = <
+ operating-points =
/* kHz uV */
- 1008000 1400000
- 912000 1350000
- 864000 1300000
- 624000 1250000
- >;
+ <1008000 1400000>,
+ <912000 1350000>,
+ <864000 1300000>,
+ <624000 1250000>;
#cooling-cells = <2>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index 7075e10911d5..3325ab07094a 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -102,15 +102,14 @@ &ccu {

&cpu0 {
clock-latency = <244144>; /* 8 32k periods */
- operating-points = <
+ operating-points =
/* kHz uV */
- 1008000 1400000
- 912000 1350000
- 864000 1300000
- 624000 1200000
- 576000 1200000
- 432000 1200000
- >;
+ <1008000 1400000>,
+ <912000 1350000>,
+ <864000 1300000>,
+ <624000 1200000>,
+ <576000 1200000>,
+ <432000 1200000>;
#cooling-cells = <2>;
};

diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index a31f9072bf79..715d74854449 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -105,13 +105,12 @@ cpu0: cpu@0 {
reg = <0>;
clocks = <&ccu CLK_CPU>;
clock-latency = <244144>; /* 8 32k periods */
- operating-points = <
+ operating-points =
/* kHz uV */
- 1008000 1200000
- 864000 1200000
- 720000 1100000
- 480000 1000000
- >;
+ <1008000 1200000>,
+ <864000 1200000>,
+ <720000 1100000>,
+ <480000 1000000>;
#cooling-cells = <2>;
};

@@ -121,13 +120,12 @@ cpu1: cpu@1 {
reg = <1>;
clocks = <&ccu CLK_CPU>;
clock-latency = <244144>; /* 8 32k periods */
- operating-points = <
+ operating-points =
/* kHz uV */
- 1008000 1200000
- 864000 1200000
- 720000 1100000
- 480000 1000000
- >;
+ <1008000 1200000>,
+ <864000 1200000>,
+ <720000 1100000>,
+ <480000 1000000>;
#cooling-cells = <2>;
};

@@ -137,13 +135,12 @@ cpu2: cpu@2 {
reg = <2>;
clocks = <&ccu CLK_CPU>;
clock-latency = <244144>; /* 8 32k periods */
- operating-points = <
+ operating-points =
/* kHz uV */
- 1008000 1200000
- 864000 1200000
- 720000 1100000
- 480000 1000000
- >;
+ <1008000 1200000>,
+ <864000 1200000>,
+ <720000 1100000>,
+ <480000 1000000>;
#cooling-cells = <2>;
};

@@ -153,13 +150,12 @@ cpu3: cpu@3 {
reg = <3>;
clocks = <&ccu CLK_CPU>;
clock-latency = <244144>; /* 8 32k periods */
- operating-points = <
+ operating-points =
/* kHz uV */
- 1008000 1200000
- 864000 1200000
- 720000 1100000
- 480000 1000000
- >;
+ <1008000 1200000>,
+ <864000 1200000>,
+ <720000 1100000>,
+ <480000 1000000>;
#cooling-cells = <2>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi.dts b/arch/arm/boot/dts/sun7i-a20-bananapi.dts
index 9d792d7a0f92..46ecf9db2324 100644
--- a/arch/arm/boot/dts/sun7i-a20-bananapi.dts
+++ b/arch/arm/boot/dts/sun7i-a20-bananapi.dts
@@ -104,16 +104,15 @@ &codec {

&cpu0 {
cpu-supply = <&reg_dcdc2>;
- operating-points = <
+ operating-points =
/* kHz uV */
- 960000 1400000
- 912000 1400000
- 864000 1350000
- 720000 1250000
- 528000 1150000
- 312000 1100000
- 144000 1050000
- >;
+ <960000 1400000>,
+ <912000 1400000>,
+ <864000 1350000>,
+ <720000 1250000>,
+ <528000 1150000>,
+ <312000 1100000>,
+ <144000 1050000>;
};

&de {
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 5a40e0280665..5574299685ab 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -106,16 +106,15 @@ cpu0: cpu@0 {
reg = <0>;
clocks = <&ccu CLK_CPU>;
clock-latency = <244144>; /* 8 32k periods */
- operating-points = <
+ operating-points =
/* kHz uV */
- 960000 1400000
- 912000 1400000
- 864000 1300000
- 720000 1200000
- 528000 1100000
- 312000 1000000
- 144000 1000000
- >;
+ <960000 1400000>,
+ <912000 1400000>,
+ <864000 1300000>,
+ <720000 1200000>,
+ <528000 1100000>,
+ <312000 1000000>,
+ <144000 1000000>;
#cooling-cells = <2>;
};

@@ -125,16 +124,15 @@ cpu1: cpu@1 {
reg = <1>;
clocks = <&ccu CLK_CPU>;
clock-latency = <244144>; /* 8 32k periods */
- operating-points = <
+ operating-points =
/* kHz uV */
- 960000 1400000
- 912000 1400000
- 864000 1300000
- 720000 1200000
- 528000 1100000
- 312000 1000000
- 144000 1000000
- >;
+ <960000 1400000>,
+ <912000 1400000>,
+ <864000 1300000>,
+ <720000 1200000>,
+ <528000 1100000>,
+ <312000 1000000>,
+ <144000 1000000>;
#cooling-cells = <2>;
};
};
--
2.31.1