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Thu, 29 Jul 2021 09:33:47 -0700 (PDT) Received: from gator ([140.82.166.162]) by smtp.gmail.com with ESMTPSA id f16sm2147192ilc.53.2021.07.29.09.33.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Jul 2021 09:33:47 -0700 (PDT) Date: Thu, 29 Jul 2021 18:33:44 +0200 From: Andrew Jones To: Oliver Upton Cc: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, Paolo Bonzini , Sean Christopherson , Marc Zyngier , Peter Shier , Jim Mattson , David Matlack , Ricardo Koller , Jing Zhang , Raghavendra Rao Anata , James Morse , Alexandru Elisei , Suzuki K Poulose , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v4 11/13] KVM: arm64: Provide userspace access to the physical counter offset Message-ID: <20210729163344.bojsdqw4z6pjdg3g@gator> References: <20210729001012.70394-1-oupton@google.com> <20210729001012.70394-12-oupton@google.com> MIME-Version: 1.0 In-Reply-To: <20210729001012.70394-12-oupton@google.com> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=drjones@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Disposition: inline X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210729_093350_889266_38EB2286 X-CRM114-Status: GOOD ( 19.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Jul 29, 2021 at 12:10:10AM +0000, Oliver Upton wrote: > Presently, KVM provides no facilities for correctly migrating a guest > that depends on the physical counter-timer. While most guests (barring > NV, of course) should not depend on the physical counter-timer, an > operator may still wish to provide a consistent view of the physical > counter-timer across migrations. > > Provide userspace with a new vCPU attribute to modify the guest physical > counter-timer offset. Since the base architecture doesn't provide a > physical counter-timer offset register, emulate the correct behavior by > trapping accesses to the physical counter-timer whenever the offset > value is non-zero. > > Uphold the same behavior as CNTVOFF_EL2 and broadcast the physical > offset to all vCPUs whenever written. This guarantees that the > counter-timer we provide the guest remains architectural, wherein all > views of the counter-timer are consistent across vCPUs. Reconfigure > timer traps for VHE on every guest entry, as different VMs will now have > different traps enabled. Enable physical counter traps for nVHE whenever > the offset is nonzero (we already trap physical timer registers in > nVHE). > > FEAT_ECV provides a guest physical counter-timer offset register > (CNTPOFF_EL2), but ECV-enabled hardware is nonexistent at the time of > writing so support for it was elided for the sake of the author :) > > Cc: Andrew Jones > Signed-off-by: Oliver Upton > --- > Documentation/virt/kvm/devices/vcpu.rst | 22 +++++++ > arch/arm64/include/asm/kvm_host.h | 1 + > arch/arm64/include/asm/kvm_hyp.h | 2 - > arch/arm64/include/asm/sysreg.h | 1 + > arch/arm64/include/uapi/asm/kvm.h | 1 + > arch/arm64/kvm/arch_timer.c | 72 ++++++++++++++--------- > arch/arm64/kvm/arm.c | 4 +- > arch/arm64/kvm/hyp/include/hyp/switch.h | 23 ++++++++ > arch/arm64/kvm/hyp/include/hyp/timer-sr.h | 26 ++++++++ > arch/arm64/kvm/hyp/nvhe/switch.c | 2 - > arch/arm64/kvm/hyp/nvhe/timer-sr.c | 21 +++---- > arch/arm64/kvm/hyp/vhe/timer-sr.c | 27 +++++++++ > include/kvm/arm_arch_timer.h | 2 - > 13 files changed, 158 insertions(+), 46 deletions(-) > create mode 100644 arch/arm64/kvm/hyp/include/hyp/timer-sr.h > Reviewed-by: Andrew Jones _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel