From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3224CC4338F for ; Mon, 2 Aug 2021 14:45:39 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id ED0DD60F51 for ; Mon, 2 Aug 2021 14:45:38 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org ED0DD60F51 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=trn7AyvjG/Eit1unkfQ8IXUsjDvSvGTYOZGoBGO35YQ=; b=H1UyRk305UMjI6 IQ6US+AGm3iIsBcEL6OS3pMhMyv8gw9Gsc4iAGDeHvUWb/2IwhYzMWrjlFxGHpgs5nY7FJxH13lbv uIlcMKh9rB/27dKgqpgrhvr/wk6Jtbe7uXG6Tnz2obuTnfxHSjeWdznvqWpw9nIsUEbz6qCphNARr NYNOIUkgYx8FugHOmvroDVlvZdyO0QlrksPUMupu92vnH5pLN0fYK6cxBlJVhlmUaF7lgD/bKEIF+ vJQmui20eKwdQzj2lALUGjedd4mwullVIxywktIN6trw2kjxHDxrS59MDTAk9JIiu+IUREe8KEdXW XFX6/LyiNCRY3iM8+8eA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mAZAZ-00GhnH-Vo; Mon, 02 Aug 2021 14:43:56 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mAZAV-00GhmB-9p for linux-arm-kernel@lists.infradead.org; Mon, 02 Aug 2021 14:43:52 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 14C2D11D4; Mon, 2 Aug 2021 07:43:47 -0700 (PDT) Received: from C02TD0UTHF1T.local (unknown [10.57.10.176]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D41BD3F66F; Mon, 2 Aug 2021 07:43:45 -0700 (PDT) Date: Mon, 2 Aug 2021 15:43:42 +0100 From: Mark Rutland To: Andre Przywara Cc: linux-arm-kernel@lists.infradead.org, Jaxson.Han@arm.com, Wei.Chen@arm.com Subject: Re: [boot-wrapper PATCH 04/12] Remove `flag_no_el3` Message-ID: <20210802144342.GB59710@C02TD0UTHF1T.local> References: <20210729152050.23635-1-mark.rutland@arm.com> <20210729152050.23635-5-mark.rutland@arm.com> <20210730161305.4064f576@slackpad.fritz.box> <20210730164333.GF19569@C02TD0UTHF1T.local> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210730164333.GF19569@C02TD0UTHF1T.local> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210802_074351_492303_29DDBC79 X-CRM114-Status: GOOD ( 31.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Jul 30, 2021 at 05:43:33PM +0100, Mark Rutland wrote: > On Fri, Jul 30, 2021 at 04:13:05PM +0100, Andre Przywara wrote: > > On Thu, 29 Jul 2021 16:20:42 +0100 > > Mark Rutland wrote: > > > > Hi, > > > > > We set `flag_no_el3` when not booted at EL3 / monitor mode, and > > > subsequently we use this to determine whether we need to drop exception > > > level before entering Linux. As this can be derived from CurrentEL or > > > CPSR, the flag itself is redundant, and we can defer the check until > > > we're about to enter Linux. > > > > > > In future this will allow more logic to be converted into C, where it > > > will be easier to handle architectural variants. > > > > > > Signed-off-by: Mark Rutland > > > --- > > > arch/aarch32/boot.S | 14 +++----------- > > > arch/aarch64/boot.S | 13 ++----------- > > > 2 files changed, 5 insertions(+), 22 deletions(-) > > > > > > diff --git a/arch/aarch32/boot.S b/arch/aarch32/boot.S > > > index 2a85ad5..0bd1ca2 100644 > > > --- a/arch/aarch32/boot.S > > > +++ b/arch/aarch32/boot.S > > > @@ -31,9 +31,6 @@ ENTRY(_start) > > > cmp r0, #PSR_HYP > > > bne _switch_monitor > > > > Can't this become "beq start_no_el3" now? > > I'm working to *remove* the el3/no_el3 labels, and handle the specific > exception levels as required, so I don't want to introduce that. > > This says exactly what it does (i.e. switch to monitor mode), so I'd > rather leave it as-is. > > > > - mov r0, #1 > > > - ldr r1, =flag_no_el3 > > > - str r0, [r1] > > > b start_no_el3 > > > > > > _switch_monitor: > > > @@ -89,9 +86,9 @@ ENTRY(jump_kernel) > > > ldr lr, [r5], #4 > > > ldm r5, {r0 - r2} > > > > > > - ldr r4, =flag_no_el3 > > > - ldr r4, [r4] > > > - cmp r4, #1 > > > + mrs r4, cpsr > > > + and r4, #PSR_MODE_MASK > > > + cmp r4, #PSR_MON > > > > Is comparing explicitly against monitor mode the right thing? IIRC > > normally we come out of reset in secure SVC, and this *is* EL3 (the > > highest implemented exception level), from an ARMv8 perspective. > > I agree it's not quite right, but the situation is more complicated: > It's more complicated than that. For details see: > > * G1.4.1 "About the AArch32 PE modes" > * G1.9.1 "AArch32 state PE mode descriptions" > * G1.17 "Reset into AArch32 state" says: > > The summary is: > > * AArch32 doesn't necessarily reset into EL3. EL3 an EL2 are OPTIONAL. > > * Supervisor mode can exist in EL3, Secure EL1, and Non-Secure EL1, and > the PSR doesn't tell you which of the three you're in. > > The boot-wrapper currently assumes we reset into EL3 or Non-Secure EL2, > and this is after the switch, where we should be in monitor mode > (otherwise PSCI cannot work, since we can't write to MVBAR). I'm not > changing that assumption. Upon reflection, I'm going to drop this patch from the series for now and rework it to make the above clearer and more robust... > We should be able to rework that to *try* to switch to monitor mode, and > if that fails stick to S/NS EL1. I'm happy to tackle that as a follow > up, organising the logic so we can rely on: > > * MON being EL3 > * HYP being NS EL2 > * SVC being S EL1 or NS EL1 ... and to try to make this true as a first step. Thanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel