From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6AF34C4338F for ; Wed, 11 Aug 2021 14:51:23 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 306C6604AC for ; Wed, 11 Aug 2021 14:51:23 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 306C6604AC Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=9Frn8XQqVQpSKZKEkH5HLCAClJEboKh8acqHJeZgzNQ=; b=mOiaevGqTClmCz LGbRoK27rlXTiPd5hYg7DhluEK9YJM3L6TCrnWk+unj4UpwbzfqSkvQqhNNGuE6TDwO9rRF4pFahC SVh42frHe/ShuVoMit2piITJsAqKdKJYTtS42aKyl8mZrOWmMQE0vUwpvv6MKYyurDxV+fCEpu1bQ VgjSMDE28gdd0ID8UW7G0V2spzSzJKJDYH1gl2ai4M/sCaZ9n54ImDwpUhFV53iotOim1f1jFBpZD zKw/UbLGmcNh3yrs9631SsSFSPOxpMq3FQC/YoqKbi/TeqhXU9DwD5ZJw+QpqSMF8QnWVSrBOCtrC uFYzGWhQsZvsEJ7lpJCA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mDpXz-007Tm9-2V; Wed, 11 Aug 2021 14:49:35 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mDpXs-007Tla-Qb for linux-arm-kernel@lists.infradead.org; Wed, 11 Aug 2021 14:49:33 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 67A1F1063; Wed, 11 Aug 2021 07:49:27 -0700 (PDT) Received: from C02TD0UTHF1T.local (unknown [10.57.41.79]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6B97A3F718; Wed, 11 Aug 2021 07:49:26 -0700 (PDT) Date: Wed, 11 Aug 2021 15:49:23 +0100 From: Mark Rutland To: Marc Zyngier Cc: linux-arm-kernel@lists.infradead.org, Oliver Upton Subject: Re: [PATCH][boot-wrapper] aarch64: Enable ECV to allow access to CNTPOFF_EL2 Message-ID: <20210811144923.GC72303@C02TD0UTHF1T.local> References: <20210811092226.2316583-1-maz@kernel.org> <20210811135558.GB72303@C02TD0UTHF1T.local> <87lf589h1a.wl-maz@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <87lf589h1a.wl-maz@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210811_074928_977915_DE6DED70 X-CRM114-Status: GOOD ( 30.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Aug 11, 2021 at 03:45:21PM +0100, Marc Zyngier wrote: > On Wed, 11 Aug 2021 14:55:58 +0100, > Mark Rutland wrote: > > > > On Wed, Aug 11, 2021 at 10:22:26AM +0100, Marc Zyngier wrote: > > > If the implemnentation supports ID_AA64MMFR0_EL1.ECV==2, > > > set SCR_EL3.ECVEn to allow EL2 access to CNTPOFF_EL2. > > > > I was about to ask if that was a typo (why is this in an MMFR?), but > > that is what the ARM ARM says! > > I was just as surprised. PFR would have made a lot more sense, but I > guess someone wanted to use these last four bits as quickly as > possible... ;-) > > > > > > Signed-off-by: Marc Zyngier > > > --- > > > arch/aarch64/boot.S | 11 +++++++++-- > > > 1 file changed, 9 insertions(+), 2 deletions(-) > > > > > > diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S > > > index 7f208b5..f0aa3cb 100644 > > > --- a/arch/aarch64/boot.S > > > +++ b/arch/aarch64/boot.S > > > @@ -54,10 +54,17 @@ ASM_FUNC(_start) > > > 1: > > > /* Enable FGT if present */ > > > mrs x1, id_aa64mmfr0_el1 > > > - ubfx x1, x1, #56, #4 > > > - cbz x1, 1f > > > + ubfx x2, x1, #56, #4 > > > + cbz x2, 1f > > > > > > orr x0, x0, #(1 << 27) // FGT enable > > > +1: > > > + /* Enable ECV2 if present (allows CNTPOFF_EL2) */ > > > + ubfx x2, x1, #60, #4 > > > + cmp x2, #2 > > > + bne 1f > > > > We need to check ID_AA64MMFR0_EL1.ECV >= 2 (to handle any futrue > > variants) so the conditional branch needs to be something like `b.lt`. > > Good point. I'm surprised ECV3 hasn't hit yet! :D > > > > + > > > + orr x0, x0, #(1 << 28) // ECV enable > > > > Aside from the above, this looks good to me, and I plan to apply this > > with the below tweaks (updated patch below): > > > > * Use b.lt, as above > > > > * To keep each check self-contained, the ECV check will read > > id_aa64mmfr0_el1 itself. That removes the need to keep x1 around, and > > so we can leave the FGT check as-is. > > > > As part of some cleanup, I'm planning to move this to C, where feature > > checks will read ID fields via a helepr that implicitly reads the > > register, like: > > > > if (read_reg_field(ID_AA64MMFR0_EL1, ECV) >= 2) > > scr |= SCR_EL3_ECVEN; > > If you are actively rewriting this, maybe don't bother with the patch > and just add this as part of your rewrite. There's a bunch of preparatory stuff to fix first, so I've applied this patch (with those alterations) for now. Thanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel