From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1EEBDC4338F for ; Tue, 24 Aug 2021 10:51:37 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BD76061371 for ; Tue, 24 Aug 2021 10:51:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org BD76061371 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=wNsdD/SllOa88qzYCbhHgq7C4tANJi/9P+F1pcJsNds=; b=rPR0DWHwTffdE3 7TYsBSCE7n02K1QMnkcmhSQpTeno6m3AZXT4n2tqseKf8JjPEBXMeMrNeYRGuIXfX+imp6E927SXI ImLmdUWAWzVy3fq2ICTf695dYARZc0/klRWvF/BU5XtNflqNkLUdatbwZWr2Zcnf/Nn4uOnyJSOVY DRe2Zugn14LSBeot7zIH3n4bWSZHvSFZ+Jvf3pDx3AjwoSItq/65vmXkFW9g47kPCHEX5MJGAtJfL A69dGZL9lGcSa9lAzsNM6QHpPMHzwO88l56CvNM4X1uQtx8PrFsTKn5QXB3o/pjoaofPXl7NZMmp7 EjrB3l31OENGOdkkusCA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mITzR-002aIU-3w; Tue, 24 Aug 2021 10:49:09 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mITzN-002aHW-UR for linux-arm-kernel@lists.infradead.org; Tue, 24 Aug 2021 10:49:07 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id 0597C61248; Tue, 24 Aug 2021 10:49:03 +0000 (UTC) Date: Tue, 24 Aug 2021 11:49:01 +0100 From: Catalin Marinas To: Marc Zyngier Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?B?UmFmYcWCIE1pxYJlY2tp?= , Will Deacon , Mark Rutland , Ard Biesheuvel , Florian Fainelli , bcm-kernel-feedback-list@broadcom.com, kernel-team@android.com Subject: Re: [PATCH 5/5] arm64: Document the requirement for SCR_EL3.HCE Message-ID: <20210824104900.GB623@arm.com> References: <20210812190213.2601506-1-maz@kernel.org> <20210812190213.2601506-6-maz@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210812190213.2601506-6-maz@kernel.org> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210824_034906_041862_F795CDA7 X-CRM114-Status: GOOD ( 20.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Aug 12, 2021 at 08:02:13PM +0100, Marc Zyngier wrote: > It is amazing that we never documented this absolutely basic > requirement: if you boot the kernel at EL2, you'd better > enable the HVC instruction from EL3. > > Really, just do it. > > Signed-off-by: Marc Zyngier > --- > Documentation/arm64/booting.rst | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/Documentation/arm64/booting.rst b/Documentation/arm64/booting.rst > index a9192e7a231b..6c729d0c4bc2 100644 > --- a/Documentation/arm64/booting.rst > +++ b/Documentation/arm64/booting.rst > @@ -212,6 +212,11 @@ Before jumping into the kernel, the following conditions must be met: > - The value of SCR_EL3.FIQ must be the same as the one present at boot > time whenever the kernel is executing. > > + For all systems: > + - If EL3 is present and the kernel is entered at EL2: > + > + - SCR_EL3.HCE (bit 8) must be initialised to 0b1. > + > For systems with a GICv3 interrupt controller to be used in v3 mode: > - If EL3 is present: I'll queue this patch only for now. A nitpick, I think we should move "For all systems" and "If EL3 is present..." above the lines describing the SCR_EL3.FIQ requirement (I can make the change locally). -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel