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[213.175.37.12]) by smtp.gmail.com with ESMTPSA id v62sm1775380wme.21.2021.09.02.07.12.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Sep 2021 07:12:38 -0700 (PDT) Date: Thu, 2 Sep 2021 16:12:37 +0200 From: Andrew Jones To: Raghavendra Rao Ananta Cc: Paolo Bonzini , Marc Zyngier , James Morse , Alexandru Elisei , Suzuki K Poulose , kvm@vger.kernel.org, Catalin Marinas , Peter Shier , linux-kernel@vger.kernel.org, Will Deacon , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v3 04/12] KVM: arm64: selftests: Add basic support for arch_timers Message-ID: <20210902141237.vdp7z2gohdh732qs@gator> References: <20210901211412.4171835-1-rananta@google.com> <20210901211412.4171835-5-rananta@google.com> MIME-Version: 1.0 In-Reply-To: <20210901211412.4171835-5-rananta@google.com> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=drjones@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Disposition: inline X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210902_071246_231427_D6E5F9FA X-CRM114-Status: GOOD ( 28.47 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Sep 01, 2021 at 09:14:04PM +0000, Raghavendra Rao Ananta wrote: > Add a minimalistic library support to access the virtual timers, > that can be used for simple timing functionalities, such as > introducing delays in the guest. > > Signed-off-by: Raghavendra Rao Ananta > --- > .../kvm/include/aarch64/arch_timer.h | 142 ++++++++++++++++++ > 1 file changed, 142 insertions(+) > create mode 100644 tools/testing/selftests/kvm/include/aarch64/arch_timer.h > > diff --git a/tools/testing/selftests/kvm/include/aarch64/arch_timer.h b/tools/testing/selftests/kvm/include/aarch64/arch_timer.h > new file mode 100644 > index 000000000000..9df5b63abc47 > --- /dev/null > +++ b/tools/testing/selftests/kvm/include/aarch64/arch_timer.h > @@ -0,0 +1,142 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * ARM Generic Timer specific interface > + */ > + > +#ifndef SELFTEST_KVM_ARCH_TIMER_H > +#define SELFTEST_KVM_ARCH_TIMER_H > + > +#include "processor.h" > + > +enum arch_timer { > + VIRTUAL, > + PHYSICAL, > +}; > + > +#define CTL_ENABLE (1 << 0) > +#define CTL_IMASK (1 << 1) > +#define CTL_ISTATUS (1 << 2) > + > +#define msec_to_cycles(msec) \ > + (timer_get_cntfrq() * (uint64_t)(msec) / 1000) > + > +#define usec_to_cycles(usec) \ > + (timer_get_cntfrq() * (uint64_t)(usec) / 1000000) > + > +#define cycles_to_usec(cycles) \ > + ((uint64_t)(cycles) * 1000000 / timer_get_cntfrq()) > + > +static inline uint32_t timer_get_cntfrq(void) > +{ > + return read_sysreg(cntfrq_el0); > +} > + > +static inline uint64_t timer_get_cntct(enum arch_timer timer) > +{ > + isb(); > + > + switch (timer) { > + case VIRTUAL: > + return read_sysreg(cntvct_el0); > + case PHYSICAL: > + return read_sysreg(cntpct_el0); > + default: > + GUEST_ASSERT_1(0, timer); > + } > + > + /* We should not reach here */ > + return 0; > +} > + > +static inline void timer_set_cval(enum arch_timer timer, uint64_t cval) > +{ > + switch (timer) { > + case VIRTUAL: > + write_sysreg(cntv_cval_el0, cval); > + break; > + case PHYSICAL: > + write_sysreg(cntp_cval_el0, cval); Huh, looks like we managed to merge a backwards write_sysreg into kvm selftests. write_sysreg in the kernel and kvm-unit-tests is (value, reg). We should post a patch fixing that before adding more calls to it. > + break; > + default: > + GUEST_ASSERT_1(0, timer); > + } > + > + isb(); > +} > + > +static inline uint64_t timer_get_cval(enum arch_timer timer) > +{ > + switch (timer) { > + case VIRTUAL: > + return read_sysreg(cntv_cval_el0); > + case PHYSICAL: > + return read_sysreg(cntp_cval_el0); > + default: > + GUEST_ASSERT_1(0, timer); > + } > + > + /* We should not reach here */ > + return 0; > +} > + > +static inline void timer_set_tval(enum arch_timer timer, uint32_t tval) > +{ > + switch (timer) { > + case VIRTUAL: > + write_sysreg(cntv_tval_el0, tval); > + break; > + case PHYSICAL: > + write_sysreg(cntp_tval_el0, tval); > + break; > + default: > + GUEST_ASSERT_1(0, timer); > + } > + > + isb(); > +} > + > +static inline void timer_set_ctl(enum arch_timer timer, uint32_t ctl) > +{ > + switch (timer) { > + case VIRTUAL: > + write_sysreg(cntv_ctl_el0, ctl); > + break; > + case PHYSICAL: > + write_sysreg(cntp_ctl_el0, ctl); > + break; > + default: > + GUEST_ASSERT_1(0, timer); > + } > + > + isb(); > +} > + > +static inline uint32_t timer_get_ctl(enum arch_timer timer) > +{ > + switch (timer) { > + case VIRTUAL: > + return read_sysreg(cntv_ctl_el0); > + case PHYSICAL: > + return read_sysreg(cntp_ctl_el0); > + default: > + GUEST_ASSERT_1(0, timer); > + } > + > + /* We should not reach here */ > + return 0; > +} I'll have to look at the test code that uses the above functions, but I wonder if it wouldn't be better to define two test functions, one for vtimer and one for ptimer where the sysreg accesses are direct, rather than all these switched wrappers. > + > +static inline void timer_set_next_cval_ms(enum arch_timer timer, uint32_t msec) > +{ > + uint64_t now_ct = timer_get_cntct(timer); > + uint64_t next_ct = now_ct + msec_to_cycles(msec); > + > + timer_set_cval(timer, next_ct); > +} > + > +static inline void timer_set_next_tval_ms(enum arch_timer timer, uint32_t msec) > +{ > + timer_set_tval(timer, msec_to_cycles(msec)); > +} I'll also look at how these wrappers are used, since open coding them may be OK. Thanks, drew > + > +#endif /* SELFTEST_KVM_ARCH_TIMER_H */ > -- > 2.33.0.153.gba50c8fa24-goog > > _______________________________________________ > kvmarm mailing list > kvmarm@lists.cs.columbia.edu > https://lists.cs.columbia.edu/mailman/listinfo/kvmarm > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel